davids5 commented on a change in pull request #1380:
URL: https://github.com/apache/incubator-nuttx/pull/1380#discussion_r451861945



##########
File path: arch/arm/src/stm32f7/stm32_tickless.c
##########
@@ -988,22 +988,31 @@ int up_timer_start(FAR const struct timespec *ts)
 }
 #endif
 
+#ifdef CONFIG_SCHED_TICKLESS_ALARM
 int up_alarm_start(FAR const struct timespec *ts)
 {
   uint64_t tm = ((uint64_t)ts->tv_sec * NSEC_PER_SEC + ts->tv_nsec) /
                 NSEC_PER_TICK;
-  uint64_t counter = ((uint64_t)g_tickless.overflow << 32) |
-                     STM32_TIM_GETCOUNTER(g_tickless.tch);
-
-  g_tickless.last_alrm = tm;
+  irqstate_t flags;
 
-  int32_t diff = tm / NSEC_PER_TICK + counter;
+  flags = enter_critical_section();
 
   STM32_TIM_SETCOMPARE(g_tickless.tch, CONFIG_STM32F7_TICKLESS_CHANNEL, tm);
 
   stm32_tickless_ackint(g_tickless.channel);
   stm32_tickless_enableint(CONFIG_STM32F7_TICKLESS_CHANNEL);
 
+  g_tickless.pending = true;
+
+  uint64_t counter = ((uint64_t)g_tickless.overflow << 32) |
+                     STM32_TIM_GETCOUNTER(g_tickless.tch);
+
+  if (counter > tm)
+    {
+      stm32_interval_handler();

Review comment:
       @antmerlino Could this result in 16 or 32 bits (based on timer type) 
counts of the timer with interrupts off?
   




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