chirping78 commented on PR #15985: URL: https://github.com/apache/nuttx/pull/15985#issuecomment-2735567042
> Hi @chirping78 > > Sorry, one more discussion: while level-2 and above interrupt, PS.EXCM also set to 1. > > So if context switching happens, there is also double exception if window ratation instruction is executed. The sequence like: threadA PS.EXCM is 0 -> PS.EXCM set to 1 while level-2 interrupt -> context switching to threadB -> level-2 interrupt and resume threadA with PS.EXCM=1, then double exception > > > Is it possible and correct understanding? the sequence is not clear. Let's use this convention: `PS` means ***the CPU hardware***, while `REG_PS` is PS saved in ***the register saving area***. please rewrite the sequence using the convention (maybe when you rewrite, you'll make it out yourself) -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: commits-unsubscr...@nuttx.apache.org For queries about this service, please contact Infrastructure at: us...@infra.apache.org