patacongo commented on a change in pull request #1728: URL: https://github.com/apache/incubator-nuttx/pull/1728#discussion_r484437751
########## File path: boards/arm/sama5/giant-board/include/board.h ########## @@ -0,0 +1,316 @@ +/**************************************************************************** + * boards/arm/sama5/giant-board/include/board.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gn...@nuttx.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __BOARDS_ARM_SAMA5_GIANT_BOARD_INCLUDE_BOARD_H +#define __BOARDS_ARM_SAMA5_GIANT_BOARD_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#ifndef __ASSEMBLY__ +# include <stdbool.h> +# include <nuttx/irq.h> +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking *****************************************************************/ + +/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC. + * These definitions will configure operational clocking. + */ + +/* On-board crystal frequencies */ + +#define BOARD_MAINOSC_FREQUENCY (24000000) /* MAINOSC: 12MHz crystal on-board */ +#define BOARD_SLOWCLK_FREQUENCY (32768) /* Slow Clock: 32.768KHz */ + +#if defined(CONFIG_SAMA5_BOOT_SDRAM) +/* When booting from SDRAM, NuttX is loaded in SDRAM by an intermediate + * bootloader. + * That bootloader had to have already configured the PLL and SDRAM for + * proper operation. + * + * In this case, we don not reconfigure the clocking. + * Rather, we need to query the register settings to determine the clock + * frequencies. + * We can only assume that the Main clock source is the on-board 24MHz + * crystal. + */ + +# include <arch/board/board_sdram.h> + +#elif defined(CONFIG_GIANT_BOARD_492MHZ) + +/* This is the configuration results in a CPU clock of 498MHz. + * + * In this configuration, UPLL is the source of the UHPHS clock (if enabled). + */ + +# include <arch/board/board_492mhz.h> + +#endif + +/* LED definitions **********************************************************/ + +/* There is a status LED on board the Giant Board. + * + * ------------------------------ ------------------- --------------------- + * SAMA5D27 PIO SIGNAL USAGE + * ------------------------------ ------------------- --------------------- + * PA6 STATUS_LED Orange LED + * ------------------------------ ------------------- --------------------- + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_ORANGE 0 +#define BOARD_NLEDS 1 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_ORANGE_BIT (1 << BOARD_ORANGE) + +/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is + * defined. In that case, the usage by the board port is defined in + * include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related + * events as follows. Note that only the GREEN LED is used in this case + * + * SYMBOL Val Meaning Green LED + * ----------------- --- ----------------------- ----------- + */ + +#define LED_STARTED 0 /* NuttX has been started OFF */ +#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF */ +#define LED_STACKCREATED 1 /* Idle stack created ON */ +#define LED_INIRQ 2 /* In an interrupt N/C */ +#define LED_SIGNAL 2 /* In a signal handler N/C */ +#define LED_ASSERTION 2 /* An assertion failed N/C */ +#define LED_PANIC 3 /* The system has crashed Flash */ +#undef LED_IDLE /* MCU is is sleep mode Not used */ + +/* Thus if the Orange LED is statically on, NuttX has successfully booted + * and is, apparently, running normally. + * If LED is flashing at approximately 2Hz, then a fatal error has been + * detected and the system has halted. + */ + +/* Pin disambiguation *******************************************************/ + +/* Alternative pin selections are provided with a numeric suffix like _1, _2, + * etc. Drivers, however, will use the pin selection without the numeric + * suffix. + * Additional definitions are required in this board.h file. + * For example, if we wanted the PCK0on PB26, then the following definition + * should appear in the board.h header file for that board: + * + * #define PIO_PMC_PCK0 PIO_PMC_PCK0_1 + * + * The PCK logic will then automatically configure PB26 as the PCK0 pin. + */ + +/* UART1. There is a TTL serial connection available on + * pins RX and TX. This is be driven by UART1. + * + * ---- ------------------------ ------------- + * J1/2 SCHEMATIC SAMA5D2 + * PIN NAME(s) PIO FUNCTION + * ---- ------------------------ ------------- + * 14 UART1_RX PD3 UTXD1 + * 15 UART1_TX PD2 URXD1 + * ---- ------------------------ ------------- + */ + +#define PIO_UART1_RXD PIO_UART1_RXD_1 +#define PIO_UART1_TXD PIO_UART1_TXD_1 + +/* FLEXCOM4 is available as a UART. + * + * ----- ------- ------------- + * J1/2 BOARD SAMA5D2 + * PIN NAME PIO FUNCTION + * ----- ------- ------------- + * 6 AD2 PD21 FLEXCOM4 + * 9 AD3 PD22 FLEXCOM4 + * ----- ------- ------------- + */ + +#define PIO_FLEXCOM4_IO0 PIO_FLEXCOM4_IO0_2 +#define PIO_FLEXCOM4_IO1 PIO_FLEXCOM4_IO1_2 + +/* PIO pins */ + +#define PIO_TX IO_ + +/* Giant Board Pinout + * + * Orientation is on pinout diagram, USB connector up. + * https://groboards.com/giant-board/ + * + * The Giant Board doesn't have pin numbers, instead the pins are labeled + * with the first function in this list. (AD4, AD2, etc.) + * + * J1 - left pins + * + * Reset + * 3.3V + * VREF + * GND + * AD4 / PD23 + * AD2 / PD21 + * AD1 / PD20 + * AD5 / PD24 + * AD3 / PD22 + * AD0 / PD19 + * SCK / PA14 + * MOSI / PA15 + * MISO / PA16 + * RX / PD2 + * TX / PD3 + * GND + * + * J2 - right pins + * + * VBAT + * EN + * VBUS + * PD13 + * PD31 + * PWM1 / PB0 + * PWM3 / PB7 + * PWML1 / PB1 + * PWM2 / PB5 + * PB3 / PWMEXTRG + * SCL / PC0 + * SDA / PB31 + * + */ + +/* J1 - left pins */ + +#define GB_PIO_AD4 PIO_ADC_AD4 /* AD4 / PD23 */ +#define GB_PIO_PD23 PIO_ADC_AD4 /* AD4 / PD23 */ + +#define GB_PIO_AD2 PIO_ADC_AD2 /* AD2 / PD21 */ +#define GB_PIO_PD21 PIO_ADC_AD2 /* AD2 / PD21 */ + +#define GB_PIO_AD1 PIO_ADC_AD1 /* AD1 / PD20 */ +#define GB_PIO_PD20 PIO_ADC_AD1 /* AD1 / PD20 */ + +#define GB_PIO_AD5 PIO_ADC_AD5 /* AD5 / PD24 */ +#define GB_PIO_PD24 PIO_ADC_AD5 /* AD5 / PD24 */ + +#define GB_PIO_AD3 PIO_ADC_AD3 /* AD3 / PD22 */ +#define GB_PIO_PD22 PIO_ADC_AD3 /* AD3 / PD22 */ + +#define GB_PIO_AD0 PIO_ADC_AD0 /* AD0 / PD19 */ +#define GB_PIO_PD19 PIO_ADC_AD0 /* AD0 / PD19 */ + +#define GB_PIO_SCK PIO_SPI0_SPCK_1 /* SCK / PA14 */ +#define GB_PIO_PA14 PIO_SPI0_SPCK_1 /* SCK / PA14 */ + +#define GB_PIO_MOSI PIO_SPI0_MOSI_1 /* MOSI / PA15 */ +#define GB_PIO_PA15 PIO_SPI0_MOSI_1 /* MOSI / PA15 */ + +#define GB_PIO_MISO PIO_SPI0_MISO_1 /* MISO / PA16 */ +#define GB_PIO_PA16 PIO_SPI0_MISO_1 /* MISO / PA16 */ + +#define GB_PIO_RX PIO_UART0_TXD /* RX / PD2 */ +#define GB_PIO_PD2 PIO_UART0_TXD /* RX / PD2 */ + +#define GB_PIO_TX PIO_UART0_RXD /* TX / PD3 */ +#define GB_PIO_PD3 PIO_UART0_RXD /* TX / PD3 */ + +/* J2 - right pins */ + +#define GB_PIO_PD13 PIO_TC1_CLK_2 /* PD13 */ + +#define GB_PIO_PD31 PIO_TC3_CLK_3 /* PD31 */ + +#define GB_PIO_PWM1 PIO_PWM0_H1 /* PWM1 / PB0 */ +#define GB_PIO_PB0 PIO_PWM0_H1 /* PWM1 / PB0 */ + +#define GB_PIO_PWM3 PIO_PWM0_H3 /* PWM3 / PB7 */ +#define GB_PIO_PB7 PIO_PWM0_H3 /* PWM3 / PB7 */ + +#define GB_PIO_PWML1 PIO_PWM0_L1 /* PWML1 / PB1 */ +#define GB_PIO_PB1 PIO_PWM0_L1 /* PWML1 / PB1 */ + +#define GB_PIO_PWM2 PIO_PWM0_H2 /* PWM2 / PB5 */ +#define GB_PIO_PB5 PIO_PWM0_H2 /* PWM2 / PB5 */ + +#define GB_PIO_PB3 PIO_PWM0_EXTRG0 /* PB3 / PWMEXTRG */ +#define GB_PIO_PWMEXTRG PIO_PWM0_EXTRG0 /* PB3 / PWMEXTRG */ + +#define GB_PIO_SCL PIO_TWI0_CK_2 /* SCL / PC0 */ +#define GB_PIO_PC0 PIO_TWI0_CK_2 /* SCL / PC0 */ + +#define GB_PIO_SCL PIO_TWI0_D_2 /* SDA / PB31 */ +#define GB_PIO_PB31 PIO_TWI0_D_2 /* SDA / PB31 */ + Review comment: The above definitions are all internal to the board implementation and must NOT be exposed in the board.h header file. Please move to the giant-board.h header file. ---------------------------------------------------------------- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. For queries about this service, please contact Infrastructure at: us...@infra.apache.org
