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commit 2ec1923321d1022edadd7844b269fc90cda400c6
Author: raiden00pl <[email protected]>
AuthorDate: Tue Oct 13 12:59:07 2026 +0200

    drivers/net/igc: Fix the TX queue 0 valid bit in IVAR0.
    
    The TX queue 0 valid bit is bit 15, not bit 7 (RX queue 0).  Same bug
    as in igb.  Build tested only.
    
    Assisted-by: Claude:claude-opus-5-5
    Signed-off-by: raiden00pl <[email protected]>
---
 drivers/net/igc.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/igc.h b/drivers/net/igc.h
index 0b56aa3c9aa..e6031051bb9 100644
--- a/drivers/net/igc.h
+++ b/drivers/net/igc.h
@@ -423,7 +423,7 @@
 #define IGC_IVAR0_RXQ0_SHIFT      (0)        /* Bits 0-4: MSI-X vector 
assigned to RxQ0 */
 #define IGC_IVAR0_RXQ0_VAL        (1 << 7)   /* Bit 7: Valid bit for RxQ0 */
 #define IGC_IVAR0_TXQ0_SHIFT      (8)        /* Bits 8-12: MSI-X vector 
assigned to TxQ0 */
-#define IGC_IVAR0_TXQ0_VAL        (1 << 7)   /* Bit 7: Valid bit for TxQ0 */
+#define IGC_IVAR0_TXQ0_VAL        (1 << 15)  /* Bit 15: Valid bit for TxQ0 */
 
 /* Interrupt Vector Allocation Registers - Misc */
 

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