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commit fd53d918ac0a01c8a76285bf6d39e053ddfb153d Author: raiden00pl <[email protected]> AuthorDate: Tue Oct 13 10:08:04 2026 +0200 drivers/net/igb: Access ICR, ICS, IMS, IMC and IAM at their alias offsets. The I210 datasheet (Table 8-6) allows both 0x1500-0x1510 and the alias offsets 0x00c0-0x00e0. QEMU igb decodes only the aliases, so IMS stayed 0 and the carrier never came up. Assisted-by: Claude:claude-opus-5-5 Signed-off-by: raiden00pl <[email protected]> --- drivers/net/igb.h | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/net/igb.h b/drivers/net/igb.h index e281fd5ad3c..7292d395723 100644 --- a/drivers/net/igb.h +++ b/drivers/net/igb.h @@ -73,13 +73,17 @@ #define IGB_EEDIAG (0x01038) /* EEPROM Diagnostic */ #define IGB_VPDDIAG (0x01060) /* VPD Diagnostic */ -/* Interrupt registers */ - -#define IGB_ICR (0x1500) /* Interrupt Cause Read */ -#define IGB_ICS (0x1504) /* Interrupt Cause Set */ -#define IGB_IMS (0x1508) /* Interrupt Mask Set */ -#define IGB_IMC (0x150c) /* Interrupt Mask Clear */ -#define IGB_IAM (0x1510) /* Interrupt Acknowledge Auto–Mask */ +/* Interrupt registers. + * + * ICR, ICS, IMS, IMC and IAM are accessed at their alias offsets + * 0x00c0-0x00e0. The QEMU igb model does not decode them at 0x1500-0x1510. + */ + +#define IGB_ICR (0x00c0) /* Interrupt Cause Read */ +#define IGB_ICS (0x00c8) /* Interrupt Cause Set */ +#define IGB_IMS (0x00d0) /* Interrupt Mask Set */ +#define IGB_IMC (0x00d8) /* Interrupt Mask Clear */ +#define IGB_IAM (0x00e0) /* Interrupt Acknowledge Auto–Mask */ #define IGB_EICS (0x1520) /* Extended Interrupt Cause Set */ #define IGB_EIMS (0x1524) /* Extended Interrupt Mask Set/Read */ #define IGB_EIMC (0x1528) /* Extended Interrupt Mask Clear */
