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commit 5074da12583e78f8e2e4443572a893bf9f7fe827 Author: raiden00pl <[email protected]> AuthorDate: Tue Oct 13 11:29:05 2026 +0200 drivers/net/igb: Fix the TX queue 0 valid bit in IVAR0. The TX queue 0 valid bit is bit 15, not bit 7 (RX queue 0). Without it no TXDW interrupt is raised and TX descriptors are never reclaimed. Assisted-by: Claude:claude-opus-5-5 Signed-off-by: raiden00pl <[email protected]> --- drivers/net/igb.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/igb.h b/drivers/net/igb.h index 676eea382bf..4e8b83920b2 100644 --- a/drivers/net/igb.h +++ b/drivers/net/igb.h @@ -466,7 +466,7 @@ #define IGB_IVAR0_RXQ0_SHIFT (0) /* Bits 0-4: MSI-X vector assigned to RxQ0 */ #define IGB_IVAR0_RXQ0_VAL (1 << 7) /* Bit 7: Valid bit for RxQ0 */ #define IGB_IVAR0_TXQ0_SHIFT (8) /* Bits 8-12: MSI-X vector assigned to TxQ0 */ -#define IGB_IVAR0_TXQ0_VAL (1 << 7) /* Bit 7: Valid bit for TxQ0 */ +#define IGB_IVAR0_TXQ0_VAL (1 << 15) /* Bit 15: Valid bit for TxQ0 */ /* Interrupt Vector Allocation Registers - Misc */
