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commit 77c36150c2a3dc4e614d1d58e6bb364db6315267 Author: raiden00pl <[email protected]> AuthorDate: Sun Oct 11 16:27:36 2026 +0200 arch/arm: enable IWDG and WWDG on all STM32 families Select the watchdog IP version on the families without watchdog support so the common IWDG and WWDG drivers can be used there too. The versions are taken from the reference SVD files and the ST CMSIS device headers (the STM32L5 SVD file places WWDG WDGTB at bit 7, the CMSIS header at bit 11): - STM32_HAVE_IP_WDG_V2: STM32L5, STM32WB, STM32WL5 - STM32_HAVE_IP_WDG_V3: STM32C5, STM32N6, STM32U3 The WWDG clock is enabled by the RCC initialization on STM32C5, STM32N6, STM32U3 and STM32WL5, and the missing STM32N6 WWDG base address and RCC bits, the STM32C5/STM32U3 LSI prototypes and the STM32_LSI_FREQUENCY of the N6, U3 and WL5 boards are added. Signed-off-by: raiden00pl <[email protected]> Assisted-by: Claude Code --- Documentation/guides/chip-specific/stm32_ports.rst | 16 +++++++++++---- arch/arm/src/stm32c5/Kconfig | 1 + arch/arm/src/stm32c5/stm32_rcc_m33.h | 2 ++ arch/arm/src/stm32c5/stm32c5xx_rcc.c | 3 +++ arch/arm/src/stm32l5/Kconfig | 1 + arch/arm/src/stm32n6/Kconfig | 1 + .../src/stm32n6/hardware/stm32n6xxx_memorymap.h | 1 + arch/arm/src/stm32n6/hardware/stm32n6xxx_rcc.h | 2 ++ arch/arm/src/stm32n6/stm32n6xx_rcc.c | 23 ++++++++++++++++++++++ arch/arm/src/stm32u3/Kconfig | 1 + arch/arm/src/stm32u3/stm32_rcc_m33.h | 2 ++ arch/arm/src/stm32u3/stm32u3xx_rcc.c | 3 +++ arch/arm/src/stm32wb/Kconfig | 1 + arch/arm/src/stm32wl5/Kconfig | 1 + arch/arm/src/stm32wl5/stm32wl5_rcc.c | 18 +++++++++++------ boards/arm/stm32n6/nucleo-n657x0-q/include/board.h | 1 + boards/arm/stm32n6/stm32n6570-dk/include/board.h | 1 + boards/arm/stm32u3/nucleo-u3c5zi-q/include/board.h | 1 + boards/arm/stm32wl5/nucleo-wl55jc/include/board.h | 4 ++++ 19 files changed, 73 insertions(+), 10 deletions(-) diff --git a/Documentation/guides/chip-specific/stm32_ports.rst b/Documentation/guides/chip-specific/stm32_ports.rst index 2728faadd88..9495305322f 100644 --- a/Documentation/guides/chip-specific/stm32_ports.rst +++ b/Documentation/guides/chip-specific/stm32_ports.rst @@ -291,7 +291,7 @@ HASH to be done not supported I2C to be done not supported I3C to be done not supported ICACHE to be done not supported -IWDG to be done not supported +IWDG v3 arch/arm/src/common/stm32/stm32_iwdg.c LPDMA GPDMA arch/arm/src/common/stm32/stm32_dma_gpdma.c LPTIM to be done not supported LPUART M33 v3 arch/arm/src/common/stm32/stm32_serial_m33_v3.c @@ -306,7 +306,7 @@ TAMP to be done not supported TIM v3 arch/arm/src/common/stm32/stm32_tim.c USART/UART M33 v3 arch/arm/src/common/stm32/stm32_serial_m33_v3.c USB_FS FS not supported -WWDG to be done not supported +WWDG v3 arch/arm/src/common/stm32/stm32_wwdg.c ============ ============ ============================================================== STM32F0 @@ -743,6 +743,7 @@ GPIO to be done arch/arm/src/stm32l5/stm32l5_gpio.c GTZC to be done not supported HASH to be done not supported I2C to be done not supported +IWDG v2 arch/arm/src/common/stm32/stm32_iwdg.c OCTOSPI to be done not supported PWR to be done arch/arm/src/stm32l5/stm32l5_pwr.c RCC to be done arch/arm/src/stm32l5/stm32l5_rcc.c @@ -753,6 +754,7 @@ SPI/I2S to be done arch/arm/src/stm32l5/stm32l5_spi.c TIM/LPTIM v2 arch/arm/src/common/stm32/stm32_tim.c USART/LPUART v3 arch/arm/src/stm32l5/stm32l5_serial.c USB device not supported +WWDG v2 arch/arm/src/common/stm32/stm32_wwdg.c ============ ============ ======================================== STM32N6 @@ -769,12 +771,14 @@ EXTI to be done not supported GPIO to be done arch/arm/src/stm32n6/stm32_gpio.c GPDMA to be done not supported I2C to be done not supported +IWDG v3 arch/arm/src/common/stm32/stm32_iwdg.c PWR to be done arch/arm/src/stm32n6/stm32_pwr.c RCC to be done arch/arm/src/stm32n6/stm32_rcc.c SPI/I2S to be done not supported TIM v3 arch/arm/src/common/stm32/stm32_tim.c USART/LPUART v4 arch/arm/src/stm32n6/stm32_serial.c USB device not supported +WWDG v3 arch/arm/src/common/stm32/stm32_wwdg.c XSPI to be done not supported ============ ============ =================================== @@ -837,8 +841,8 @@ HSP to be done not supported I2C to be done not supported I3C to be done not supported ICACHE to be done not supported -IWDG to be done not supported LPTIM to be done not supported +IWDG v3 arch/arm/src/common/stm32/stm32_iwdg.c LPUART M33 v3 arch/arm/src/common/stm32/stm32_serial_m33_v3.c OCTOSPI to be done not supported OPAMP to be done not supported @@ -859,7 +863,7 @@ TSC to be done not supported USART/UART M33 v3 arch/arm/src/common/stm32/stm32_serial_m33_v3.c USB_DRD_FS to be done not supported VREFBUF to be done not supported -WWDG to be done not supported +WWDG v3 arch/arm/src/common/stm32/stm32_wwdg.c ============ ============ ============================================================= STM32U5 @@ -907,6 +911,7 @@ FLASH to be done arch/arm/src/stm32wb/stm32wb_flash.c GPIO to be done arch/arm/src/stm32wb/stm32wb_gpio.c I2C to be done arch/arm/src/stm32wb/stm32wb_i2c.c IPCC to be done arch/arm/src/stm32wb/stm32wb_ipcc.c +IWDG v2 arch/arm/src/common/stm32/stm32_iwdg.c PWR to be done arch/arm/src/stm32wb/stm32wb_pwr.c Radio to be done not supported RCC to be done arch/arm/src/stm32wb/stm32wb_rcc.c @@ -916,6 +921,7 @@ SPI/I2S to be done arch/arm/src/stm32wb/stm32wb_spi.c TIM/LPTIM v2 arch/arm/src/common/stm32/stm32_tim.c USART/LPUART v4 arch/arm/src/stm32wb/stm32wb_serial.c USB device not supported +WWDG v2 arch/arm/src/common/stm32/stm32_wwdg.c ============ ============ ======================================== STM32WL5 @@ -933,6 +939,7 @@ FLASH to be done arch/arm/src/stm32wl5/stm32wl5_flash.c GPIO to be done arch/arm/src/stm32wl5/stm32wl5_gpio.c I2C to be done not supported IPCC to be done arch/arm/src/stm32wl5/stm32wl5_ipcc.c +IWDG v2 arch/arm/src/common/stm32/stm32_iwdg.c PWR to be done arch/arm/src/stm32wl5/stm32wl5_pwr.c Radio to be done not supported RCC to be done arch/arm/src/stm32wl5/stm32wl5_rcc.c @@ -942,6 +949,7 @@ SPI/I2S to be done arch/arm/src/stm32wl5/stm32wl5_spi.c TIM/LPTIM v2 arch/arm/src/common/stm32/stm32_tim.c USART/LPUART v3 arch/arm/src/stm32wl5/stm32wl5_serial.c USB to be done not supported +WWDG v2 arch/arm/src/common/stm32/stm32_wwdg.c ============ ============ ========================================== Kconfig option organization diff --git a/arch/arm/src/stm32c5/Kconfig b/arch/arm/src/stm32c5/Kconfig index 311fd0e27c4..b25f3eb3b83 100644 --- a/arch/arm/src/stm32c5/Kconfig +++ b/arch/arm/src/stm32c5/Kconfig @@ -18,6 +18,7 @@ config STM32_C5_PERIPHERALS select STM32_HAVE_IP_GPIO_M33_V1 select STM32_HAVE_IP_TIMERS_V3 select STM32_HAVE_IP_DBGMCU_V5 + select STM32_HAVE_IP_WDG_V3 select STM32_HAVE_IP_USART_M33_V3 select STM32_HAVE_LPUART1 select STM32_HAVE_UART4 diff --git a/arch/arm/src/stm32c5/stm32_rcc_m33.h b/arch/arm/src/stm32c5/stm32_rcc_m33.h index 0cea264227b..070ef2d5dcc 100644 --- a/arch/arm/src/stm32c5/stm32_rcc_m33.h +++ b/arch/arm/src/stm32c5/stm32_rcc_m33.h @@ -85,6 +85,8 @@ void stm32_clockenable(void); #endif void stm32_rcc_enableperipherals(void); +void stm32_rcc_enablelsi(void); +void stm32_rcc_disablelsi(void); #ifdef __cplusplus } diff --git a/arch/arm/src/stm32c5/stm32c5xx_rcc.c b/arch/arm/src/stm32c5/stm32c5xx_rcc.c index b0ca2adbe56..4337d1a0ef1 100644 --- a/arch/arm/src/stm32c5/stm32c5xx_rcc.c +++ b/arch/arm/src/stm32c5/stm32c5xx_rcc.c @@ -201,6 +201,9 @@ void stm32_rcc_enableperipherals(void) #endif #ifdef CONFIG_STM32_UART5 regval |= RCC_APB1LENR_UART5EN; +#endif +#ifdef CONFIG_STM32_WWDG + regval |= RCC_APB1LENR_WWDGEN; #endif modifyreg32(STM32_RCC_APB1LENR, 0, regval); diff --git a/arch/arm/src/stm32l5/Kconfig b/arch/arm/src/stm32l5/Kconfig index 75aae22f375..6195b789841 100644 --- a/arch/arm/src/stm32l5/Kconfig +++ b/arch/arm/src/stm32l5/Kconfig @@ -14,6 +14,7 @@ config STM32_L5_PERIPHERALS select STM32_HAVE_IP_GPIO_M33_V1 select STM32_HAVE_IP_TIMERS_V2 select STM32_HAVE_IP_DBGMCU_V4 + select STM32_HAVE_IP_WDG_V2 select STM32_HAVE_IP_USART_M33_V3 select STM32_HAVE_RTC_SUBSECONDS select STM32_HAVE_RTC_MAGIC diff --git a/arch/arm/src/stm32n6/Kconfig b/arch/arm/src/stm32n6/Kconfig index f6ff68bf180..7a2ef876b36 100644 --- a/arch/arm/src/stm32n6/Kconfig +++ b/arch/arm/src/stm32n6/Kconfig @@ -12,6 +12,7 @@ config STM32_N6_PERIPHERALS default y select STM32_HAVE_IP_TIMERS_V3 select STM32_HAVE_IP_DBGMCU_V8 + select STM32_HAVE_IP_WDG_V3 select STM32_HAVE_TIM1 select STM32_HAVE_TIM2 select STM32_HAVE_TIM3 diff --git a/arch/arm/src/stm32n6/hardware/stm32n6xxx_memorymap.h b/arch/arm/src/stm32n6/hardware/stm32n6xxx_memorymap.h index 3edf37524b4..6b32aceff27 100644 --- a/arch/arm/src/stm32n6/hardware/stm32n6xxx_memorymap.h +++ b/arch/arm/src/stm32n6/hardware/stm32n6xxx_memorymap.h @@ -83,6 +83,7 @@ #define STM32_TIM13_BASE 0x50001c00 #define STM32_TIM14_BASE 0x50002000 #define STM32_LPTIM1_BASE 0x50002400 +#define STM32_WWDG_BASE 0x50002c00 #define STM32_TIM10_BASE 0x50003000 #define STM32_TIM11_BASE 0x50003400 #define STM32_SPI2_BASE 0x50003800 diff --git a/arch/arm/src/stm32n6/hardware/stm32n6xxx_rcc.h b/arch/arm/src/stm32n6/hardware/stm32n6xxx_rcc.h index 39922939fa7..55820af77aa 100644 --- a/arch/arm/src/stm32n6/hardware/stm32n6xxx_rcc.h +++ b/arch/arm/src/stm32n6/hardware/stm32n6xxx_rcc.h @@ -249,6 +249,7 @@ #define RCC_APB1LENR_TIM11EN (1 << 13) /* Bit 13: TIM11 enable */ #define RCC_APB1LENR_TIM10EN (1 << 12) /* Bit 12: TIM10 enable */ +#define RCC_APB1LENR_WWDGEN (1 << 11) /* Bit 11: WWDG enable */ #define RCC_APB1LENR_TIM14EN (1 << 8) /* Bit 8: TIM14 enable */ #define RCC_APB1LENR_TIM13EN (1 << 7) /* Bit 7: TIM13 enable */ #define RCC_APB1LENR_TIM12EN (1 << 6) /* Bit 6: TIM12 enable */ @@ -274,6 +275,7 @@ #define RCC_APB1LRSTR_TIM11RST (1 << 13) /* Bit 13: TIM11 reset */ #define RCC_APB1LRSTR_TIM10RST (1 << 12) /* Bit 12: TIM10 reset */ +#define RCC_APB1LRSTR_WWDGRST (1 << 11) /* Bit 11: WWDG reset */ #define RCC_APB1LRSTR_TIM14RST (1 << 8) /* Bit 8: TIM14 reset */ #define RCC_APB1LRSTR_TIM13RST (1 << 7) /* Bit 7: TIM13 reset */ #define RCC_APB1LRSTR_TIM12RST (1 << 6) /* Bit 6: TIM12 reset */ diff --git a/arch/arm/src/stm32n6/stm32n6xx_rcc.c b/arch/arm/src/stm32n6/stm32n6xx_rcc.c index a121aa0548e..92778ccb647 100644 --- a/arch/arm/src/stm32n6/stm32n6xx_rcc.c +++ b/arch/arm/src/stm32n6/stm32n6xx_rcc.c @@ -81,6 +81,28 @@ static inline void rcc_enableahb4(void) STM32_RCC_AHB4ENSR); } +/**************************************************************************** + * Name: rcc_enableapb1 + * + * Description: + * Enable selected APB1 peripherals. + * + ****************************************************************************/ + +static inline void rcc_enableapb1(void) +{ + uint32_t regval = 0; + +#ifdef CONFIG_STM32_WWDG + regval |= RCC_APB1LENR_WWDGEN; +#endif + + if (regval != 0) + { + putreg32(regval, STM32_RCC_APB1LENSR); + } +} + /**************************************************************************** * Name: rcc_enableapb2 * @@ -124,6 +146,7 @@ void stm32_rcc_enableperipherals(void) STM32_RCC_MEMENSR); rcc_enableahb4(); + rcc_enableapb1(); rcc_enableapb2(); } diff --git a/arch/arm/src/stm32u3/Kconfig b/arch/arm/src/stm32u3/Kconfig index cb555c99071..f23453d817c 100644 --- a/arch/arm/src/stm32u3/Kconfig +++ b/arch/arm/src/stm32u3/Kconfig @@ -16,6 +16,7 @@ config STM32_U3_PERIPHERALS select STM32_HAVE_IP_GPIO_M33_V1 select STM32_HAVE_IP_TIMERS_V3 select STM32_HAVE_IP_DBGMCU_V5 + select STM32_HAVE_IP_WDG_V3 select STM32_HAVE_IP_USART_M33_V3 select STM32_HAVE_SYSCFG select STM32_HAVE_USART1 diff --git a/arch/arm/src/stm32u3/stm32_rcc_m33.h b/arch/arm/src/stm32u3/stm32_rcc_m33.h index a2d5af1a072..a3221435041 100644 --- a/arch/arm/src/stm32u3/stm32_rcc_m33.h +++ b/arch/arm/src/stm32u3/stm32_rcc_m33.h @@ -89,6 +89,8 @@ void stm32_clockenable(void); #endif void stm32_rcc_enableperipherals(void); +void stm32_rcc_enablelsi(void); +void stm32_rcc_disablelsi(void); #undef EXTERN #if defined(__cplusplus) diff --git a/arch/arm/src/stm32u3/stm32u3xx_rcc.c b/arch/arm/src/stm32u3/stm32u3xx_rcc.c index 628c97bab0b..1b7a9026200 100644 --- a/arch/arm/src/stm32u3/stm32u3xx_rcc.c +++ b/arch/arm/src/stm32u3/stm32u3xx_rcc.c @@ -225,6 +225,9 @@ void stm32_rcc_enableperipherals(void) #endif #ifdef CONFIG_STM32_UART5 regval |= RCC_APB1ENR1_UART5EN; +#endif +#ifdef CONFIG_STM32_WWDG + regval |= RCC_APB1ENR1_WWDGEN; #endif modifyreg32(STM32_RCC_APB1ENR1, 0, regval); diff --git a/arch/arm/src/stm32wb/Kconfig b/arch/arm/src/stm32wb/Kconfig index fd32c90d883..37a8836fd0e 100644 --- a/arch/arm/src/stm32wb/Kconfig +++ b/arch/arm/src/stm32wb/Kconfig @@ -28,6 +28,7 @@ config STM32_WB_PERIPHERALS select STM32_HAVE_SYSCFG select STM32_HAVE_USART1 select STM32_HAVE_IP_DBGMCU_V6 + select STM32_HAVE_IP_WDG_V2 choice prompt "STM32 WB Chip Selection" diff --git a/arch/arm/src/stm32wl5/Kconfig b/arch/arm/src/stm32wl5/Kconfig index 634a9155fa7..acfe717f13c 100644 --- a/arch/arm/src/stm32wl5/Kconfig +++ b/arch/arm/src/stm32wl5/Kconfig @@ -42,6 +42,7 @@ config STM32_STM32WL5XXX bool select STM32_HAVE_IP_TIMERS_V2 select STM32_HAVE_IP_DBGMCU_V6 + select STM32_HAVE_IP_WDG_V2 config STM32_STM32WL5XXX_CPU1 bool diff --git a/arch/arm/src/stm32wl5/stm32wl5_rcc.c b/arch/arm/src/stm32wl5/stm32wl5_rcc.c index a4dc6f83fe3..e571ef087e6 100644 --- a/arch/arm/src/stm32wl5/stm32wl5_rcc.c +++ b/arch/arm/src/stm32wl5/stm32wl5_rcc.c @@ -328,6 +328,12 @@ static inline void stm32_rcc_enableapb1(void) regval |= RCC_APB1ENR1_TIM2EN; #endif +#ifdef CONFIG_STM32_WWDG + /* Window watchdog clock enable */ + + regval |= RCC_APB1ENR1_WWDGEN; +#endif + #ifdef CONFIG_STM32_SPI2 /* SPI2 clock enable */ @@ -587,12 +593,12 @@ void stm32_clockenable(void) void stm32_rcc_enableperipherals(void) { - stm32_rcc_enableccip(); - stm32_rcc_enableahb1(); - stm32_rcc_enableahb2(); - stm32_rcc_enableahb3(); - stm32_rcc_enableapb1(); - stm32_rcc_enableapb2(); + stm32_rcc_enableccip(); + stm32_rcc_enableahb1(); + stm32_rcc_enableahb2(); + stm32_rcc_enableahb3(); + stm32_rcc_enableapb1(); + stm32_rcc_enableapb2(); } /**************************************************************************** diff --git a/boards/arm/stm32n6/nucleo-n657x0-q/include/board.h b/boards/arm/stm32n6/nucleo-n657x0-q/include/board.h index ccbfa4e4151..702e2e9467d 100644 --- a/boards/arm/stm32n6/nucleo-n657x0-q/include/board.h +++ b/boards/arm/stm32n6/nucleo-n657x0-q/include/board.h @@ -54,6 +54,7 @@ */ #define STM32_HSI_FREQUENCY 64000000ul +#define STM32_LSI_FREQUENCY 32000 #define STM32_PLL1_M 4 #define STM32_PLL1_N 50 diff --git a/boards/arm/stm32n6/stm32n6570-dk/include/board.h b/boards/arm/stm32n6/stm32n6570-dk/include/board.h index c64d052ea29..a80a24709e3 100644 --- a/boards/arm/stm32n6/stm32n6570-dk/include/board.h +++ b/boards/arm/stm32n6/stm32n6570-dk/include/board.h @@ -54,6 +54,7 @@ */ #define STM32_HSI_FREQUENCY 64000000ul +#define STM32_LSI_FREQUENCY 32000 #define STM32_PLL1_M 4 #define STM32_PLL1_N 50 diff --git a/boards/arm/stm32u3/nucleo-u3c5zi-q/include/board.h b/boards/arm/stm32u3/nucleo-u3c5zi-q/include/board.h index 1153e93038f..88649fd1b42 100644 --- a/boards/arm/stm32u3/nucleo-u3c5zi-q/include/board.h +++ b/boards/arm/stm32u3/nucleo-u3c5zi-q/include/board.h @@ -64,6 +64,7 @@ #define STM32_PWR_VOSR_BOOST PWR_VOSR_BOOSTEN #define STM32_MSIS_FREQUENCY 96000000ul +#define STM32_LSI_FREQUENCY 32000 #define STM32_SYSCLK_FREQUENCY STM32_MSIS_FREQUENCY #define STM32_RCC_CFGR2_HPRE RCC_CFGR2_HPRE_SYSCLK diff --git a/boards/arm/stm32wl5/nucleo-wl55jc/include/board.h b/boards/arm/stm32wl5/nucleo-wl55jc/include/board.h index 91f64e57a85..7e34ce61764 100644 --- a/boards/arm/stm32wl5/nucleo-wl55jc/include/board.h +++ b/boards/arm/stm32wl5/nucleo-wl55jc/include/board.h @@ -46,6 +46,10 @@ #define STM32_BOARD_USETCXO +/* LSI clock, used by the IWDG */ + +#define STM32_LSI_FREQUENCY 32000 + /* Prescaler common to all PLL inputs */ #define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(2) /* 32MHz / 2 = 16MHz */
