ssekar15 commented on code in PR #21504:
URL: https://github.com/apache/nuttx/pull/21504#discussion_r4509574790
##########
arch/tricore/src/common/tricore_irq.c:
##########
@@ -74,26 +79,42 @@ static inline void tricore_color_intstack(void)
* Private Data
****************************************************************************/
-static const IfxSrc_Tos g_tricore_tos[] =
-{
- IfxSrc_Tos_cpu0,
- IfxSrc_Tos_cpu1,
- IfxSrc_Tos_cpu2,
- IfxSrc_Tos_cpu3,
- IfxSrc_Tos_cpu4,
- IfxSrc_Tos_cpu5,
-#ifdef CONFIG_ARCH_CHIP_TC4XX
- IfxSrc_Tos_csrm,
-#endif
-};
-
static spinlock_t g_irqlock = SP_UNLOCKED;
static int g_irqmap_count = 1;
/****************************************************************************
* Private Functions
****************************************************************************/
+/****************************************************************************
+ * Name: tricore_src_init
+ *
+ * Description:
+ * Route a service request to a core with a priority and clear a pending
+ * request. The enable bit is left as it is.
+ *
+ ****************************************************************************/
+
+static void tricore_src_init(volatile uint32_t *src, int cpu, int srpn)
+{
+ uint32_t regval = *src;
+
+ regval &= ~(TRICORE_SRC_SRPN_MASK | TRICORE_SRC_TOS_MASK);
+#ifdef TRICORE_SRC_VM_MASK
+ regval &= ~TRICORE_SRC_VM_MASK;
+#endif
+#ifdef TRICORE_SRC_CS
+ if (up_cpu_index() == 6)
Review Comment:
Agreed, up_cpu_index is 0 without ARCH_HAVE_MULTICPU. Thanks
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