xiaoxiang781216 commented on code in PR #8665: URL: https://github.com/apache/nuttx/pull/8665#discussion_r1119152568
########## arch/arm64/src/common/arm64_arch.h: ########## @@ -529,6 +539,44 @@ void arm64_cpu_enable(void); # define arm64_cpu_enable() #endif +/**************************************************************************** + * Name: arm64_get_mpidr/arm64_get_cpuindex + * + * Description: + * The function from cpu index to get cpu mpid which is reading + * from mpidr_el1 register, the register is define: + * - bit 0~7: Aff0 + * - bit 8~15: Aff1 + * - bit 16~23: Aff2 + * - bit 24: MT, multithreading + * - bit 25~29: RES0 + * - bit 30: U, multiprocessor/Uniprocessor + * - bit 31: RES1 + * - bit 32~39: Aff3 + * - bit 40~63: RES0 + * Different ARM64 Core will use different Affn define, the mpidr_el1 + * value is not CPU number, So we need to change CPU number to mpid + * and vice versa + * + ****************************************************************************/ + +#ifdef CONFIG_SMP +extern const struct arm64_cpu_info g_arm64_cpu_info[CONFIG_SMP_NCPUS]; Review Comment: remove -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: commits-unsubscr...@nuttx.apache.org For queries about this service, please contact Infrastructure at: us...@infra.apache.org
