vvchernov commented on PR #13621: URL: https://github.com/apache/tvm/pull/13621#issuecomment-1364905860
> Thank you @vvchernov for this excellent addition on x86 coverage ! > > * I've suggested few nits in the code, mostly cosmetic. > * We could add (next PR?) 4x4 (ssse3/m128), 8x4 (avx2/m256) `skylake` counterparts: > https://github.com/apache/tvm/blob/58f924da5ca61f25ca7236e0ff4e8d78e9de1f4d/python/tvm/topi/x86/tensor_intrin.py#L90-L107 Thanks! I agree and also thought how it can be done in reasonable way. And yes, I think it should be done in separated PR. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
