tmoreau89 commented on code in PR #13844:
URL: https://github.com/apache/tvm/pull/13844#discussion_r1089571055
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src/tir/transforms/lower_async_dma.cc:
##########
@@ -192,19 +198,33 @@ class AsyncDMALowerer : public StmtExprMutator {
// save queue ID for inspection in `wait` transform
queue_ids_.insert(queue_id);
- return Evaluate(Call(DataType::Int(32), builtin::dma_copy(),
- {queue_id,
- Call(DataType::Handle(), builtin::address_of(),
- {BufferLoad(bufferstorenode->buffer,
store_index)}),
- Call(DataType::Handle(), builtin::address_of(),
- {BufferLoad(bufferloadnode->buffer,
load_index)}),
- for_loop->extent * bufferloadnode->dtype.bytes(),
dma_bypass_cache_}));
+ auto call_dma_copy =
+ Evaluate(Call(DataType::Int(32), builtin::dma_copy(),
+ {queue_id,
+ Call(DataType::Handle(), builtin::address_of(),
+ {BufferLoad(bufferstorenode->buffer,
store_index)}),
+ Call(DataType::Handle(), builtin::address_of(),
+ {BufferLoad(bufferloadnode->buffer,
load_index)}),
+ for_loop->extent * bufferloadnode->dtype.bytes(),
dma_bypass_cache_}));
+
+ // if the buffer we are about to DMA was modified by the primfunc
+ // then we need to flush the buffer from the cache prior to the DMA
Review Comment:
Agreed that it's probably better to perform an invalidation vs. flush
depending on the directionality of the data transfer:
- Upon DMA “read”, you have to flush before
- Upon DMA “write”, you have to invalidate after
A helpful example hopefully could be what was done for VTA when VTA would be
implemented with non-coherent DMA, as in here:
https://github.com/apache/tvm/blob/bf0607bd317a7db8eba1a91c12170934c1ad201f/vta/runtime/runtime.cc#L1319-L1329
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