On Sunday 15 December 2002 11:17 pm, andre wrote: >> A modern 128 byte wide gpu can (for example) fill 128/4 = 32 pixels with >> one memory access. And for any other operation apart from reading, ie, >> alpha blend two pixels, will you also build a 3-byte register to multiply >> and add ? And if you have 32bit registers, each access for a non trivial >> read or write implies a pack-unpack operation...
> with a 128 byte wide gpu you could fill 128/3=42pixels. a 30% increase. And > this maybe a non trivial operation but it isn't exactly rocketscience > either. It could be easy done in one clock cycle and because you know > probably which memory you want to read next it will even cost even less. In > my opinion they do it. Yes, the device which does most of the pack/unpack instantly (no clock cycles) is called a `barrel shifter' and in the days when the Motorola MC68000 came out it was notable that some brave soul has spent enough chip real estate to include one. It made maths operations other than the built-in ones (like multiply) much faster. Nowadays, that much real estate would go completely un-noticed. The complications arise when a 3-byte colour bundle crosses a word (longword) boundary, since you have to arrange your logic to get a piece of your information from one location, and another piece from a second. This is usually made to happen in `no clock cycles' by a minor bit of pipelining. There is even more complexity to consider given that the chip must also operate in 8- and 16-bit modes, and there is some virtue to a genuine 32-bit colour mode (as in, extended RGB with 10 bits of R and B, and 12 of G) as well as RGBA. However, the reasoning goes, the last thing a modern GPU needs is more complexity, more transistors, more heat-generating parts. My counter-argument against that last is that moving 25% more bytes - at least as far as the boundary of the chip - makes more heat anyway, and the extra complexity is insignificant compared to what already exists. However, that wasn't my call. Cheers; Leon
