On 08.09.2008 14:31, Stefan Reinauer wrote: > Rudolf Marek wrote: > >> If needed, writing to SLP register might be traped by SMM, and BIOS >> can save some values to NVRAM regs, sometimes found in chipsets >> (memory timing etc) to ease the startup. But we dont need that we are >> fast anyway. >> > Some chipsets even require some bits to be stored in nvram as they do > not support probing/reading them when coming out of S3. >
Do these chipsets also support S3-surviving scratch registers we could use instead of NVRAM? Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
