On 08.09.2008 14:29, Stefan Reinauer wrote: > Carl-Daniel Hailfinger wrote: > >> intraphase is initram? Would it make sense to have a fast path in >> initram for this? >> >> > Yes, it is even required. > >>> <ruik> 4) when creating ACPI tables look to that place, in one table there >>> will be OS waking vector >>> <ruik> 5) after all done, jump to OS instead of payload, switch A20 on go >>> to real mode and jump >>> <ruik> 6) do this all steps in reserved memory, do not corrupt system >>> memory used by OS >>> >>> I think 6) in particular deserves some consideration. >>> >>> >>> >> 6) is really easy with v3. A lot easier than with v2. I think I wrote a >> design doc about that one year ago. >> >> > Have a pointer? >
I couldn't find the mail after a quick search, but it basically boils down to: - Declare the CAR area as reserved. - Declare some scratch space at the top of memory as reserved. - When loading any LAR member which is not XIP, back up the memory that would be clobbered to the reserved area at the top of memory. - Make sure to store any created tables only in specially reserved memory. - After finishing execution of a LAR member, restore the clobbered memory from backup. >> However, I am surprised that the SuperI/O acts as a power supply for RAM. >> >> > The SuperIO has GPIOs. These control various things, among them can be > the power lines of devices, such as WiFi or even RAM. Software needs to > be able to control RAM power, so either the southbridge GPIOs or the > SuperIO GPIOs are used for that. > Cool. Could you add that very important information to the wiki somewhere? Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
