ron minnich wrote:
> This gets us to etherboot again, but this time devices are set
> up correctly on bus 1 --- i.e., the scan of the 8111 bridge works. It even
> tries to find the vga rom to run it, which we did not get before.
>
> Signed-off-by: Ronald G. Minnich <[EMAIL PROTECTED]>
If you explain the below, it's:
Acked-by: Peter Stuge <[EMAIL PROTECTED]>
> +++ southbridge/amd/amd8111/usb.c (working copy)
> + .phase4_enable_disable = amd8111_enable,
Ok, enable USB.
> +++ mainboard/amd/serengeti/dts (working copy)
> [EMAIL PROTECTED],0 {
> /config/("northbridge/amd/k8/pci");
> [EMAIL PROTECTED],0 {
> - /config/("southbridge/amd/amd8111/amd8111.dts");
> + /config/("southbridge/amd/amd8111/pci.dts");
> + [EMAIL PROTECTED],0{
> +
> /config/("southbridge/amd/amd8111/nic.dts");
> + };
> };
> [EMAIL PROTECTED],0 {
> /config/("southbridge/amd/amd8111/ide.dts");
> };
> - [EMAIL PROTECTED],0 {
> - /config/("southbridge/amd/amd8111/nic.dts");
> - };
> };
Why treat nic and ide differently here? And what about that USB? Is
it automatically added - and ide+nic needs to be explicitly listed?
> +++ arch/x86/Makefile (working copy)
> - pci_ops_conf1.c resourcemap.c
> + pci_ops_conf1.c
Just cleanup? Isn't resourcemap needed because of the change or was
it never needed?
//Peter
--
coreboot mailing list: [email protected]
http://www.coreboot.org/mailman/listinfo/coreboot