> -----Original Message----- > From: ron minnich [mailto:[EMAIL PROTECTED] > Sent: Thursday, October 09, 2008 4:54 PM > To: Myles Watson > Cc: Coreboot > Subject: Re: v2 and v3 pci differences > > On Thu, Oct 9, 2008 at 1:58 PM, Myles Watson <[EMAIL PROTECTED]> wrote: > > Here are the major differences between v2 and v3 initializing serengeti > > cheetah. The biggest problem is that the memory-mapped I/O ends up in > the > > wrong place (see the Display controller's ROM address) > > This one is easy: > > if ((dev->on_mainboard) && (dev->rom_address == 0)) { > // Skip it if rom_address is not set in MB Config.lb. > // TODO: No more Config.lb in coreboot-v3. > return; > } > > > > we have not done it yet. > > If anybody wants to get to this before I do, the help is appreciated. > I think it needs a dtc fix. > > i.e. in a dts for a part, > rom_address = "fff00000"; > and the dtc needs to know this is one of the special properties in the > device struct. >
I agree that needs to be done, but in this case the VGA card is not onboard. I think the I/O mapping is wrong, which makes it so that when the signature gets read it comes back 0xffff instead of 0xa5a5. Thanks, Myles -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
