> -----Original Message----- > From: Rudolf Marek [mailto:[EMAIL PROTECTED] > Sent: Tuesday, December 02, 2008 7:11 AM > To: Myles Watson > Cc: 'Marc Jones'; 'Coreboot' > Subject: Re: [coreboot] Resource Allocation discussion > > >> Yes, APICs are generally at FEC00000(IO) and FEE00000(local). > > > > So these should be created in the domain? > > Yes and no? Check this: > > http://www.coreboot.org/Memory_map
Thanks for the pointers! > Also MMCONFIG region should be somewhere. For VIAs, the static resources > are in > .h files in V2 > http://tracker.coreboot.org/trac/coreboot/browser/trunk/coreboot- > v2/src/southbridge/via/k8t890/k8t890.h > http://tracker.coreboot.org/trac/coreboot/browser/trunk/coreboot- > v2/src/southbridge/via/vt8237r/vt8237r.h > > Problem is that some resources (APICs can be only on arbitrary range, > typically > 0xfec0 0000 - 0xfecf ffff > > So DEVICE_MEM_HIGH should be lower then those .h files?? And IO_LOW would > be > nice too... I'm hoping that these defines can go away. I'd like each board or each domain to define their areas explicitly. So, for example, the k8t890 has: ------- From k8t890_traf_ctrl.c ------ pci_dev_read_resources(dev); res = new_resource(dev, 0x40); /* NB APIC fixed to this address. */ res->base = K8T890_APIC_BASE; res->size = 256; res->limit = res->base + res->size - 1; res->align = 8; res->gran = 8; res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; /* Add an MMCONFIG resource. */ res = new_resource(dev, K8T890_MMCONFIG_MBAR); res->size = 256 * 1024 * 1024; res->align = log2(res->size); res->gran = log2(res->size); res->limit = 0xffffffff; /* 4G */ res->flags = IORESOURCE_MEM; ------- end ---------- So it seems like we could add bridge resources that contain all the space that can be used for allocations to the domain below this. > -----Original Message----- > > Sorry I forgot to ask if the DEVICE_MEM_HIGH is in fact the HIGH limit for > MMIO > or not. I don't know for sure. > Of course CPU must be instructed to decode the addresses as MMIO > too. Yes. > But in some range we need static allocation. > > For MMIO decode: > > DEVICE_MEM_LOW =< DEVICE_MEM_LOW_STATIC < DEVICE_MEM_HIGH_STATIC =< > DEVICE_MEM_HIGH > > And similar for IO decode. > > Like here K8 resources: > > MMIO map: #7 0x0040000000 - 0x00ff70ffff Access: R/W Dstnode:0 DstLink > 0 > IO map: #0 0x000000 - 0x000fff Access: / Dstnode:0 DstLink 0 > IO map: #1 0x001000 - 0x0fffff Access: R/W VGA Dstnode:0 DstLink 0 > IO map: #2 0x000000 - 0x000fff Access: / Dstnode:0 DstLink 0 > IO map: #3 0x000000 - 0x000fff Access: / Dstnode:0 DstLink 0 If we explicitly declare the resources we use, I'm hoping that the device-specific code can do the right thing. Thanks, Myles -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
