Author: stepan Date: 2009-03-06 18:24:29 +0100 (Fri, 06 Mar 2009) New Revision: 3977
Modified: trunk/coreboot-v2/src/arch/i386/boot/acpi.c trunk/coreboot-v2/src/arch/i386/boot/multiboot.c trunk/coreboot-v2/src/arch/i386/boot/tables.c trunk/coreboot-v2/src/arch/i386/smp/ioapic.c trunk/coreboot-v2/src/cpu/x86/lapic/lapic_cpu_init.c trunk/coreboot-v2/src/cpu/x86/tsc/delay_tsc.c trunk/coreboot-v2/src/devices/device.c Log: fix a bunch of cast and type warnings and don't call the apic "nvram", that doesn't make no sense. (trivial) Signed-off-by: Stefan Reinauer <[email protected]> Acked-by: Stefan Reinauer <[email protected]> Modified: trunk/coreboot-v2/src/arch/i386/boot/acpi.c =================================================================== --- trunk/coreboot-v2/src/arch/i386/boot/acpi.c 2009-03-06 17:22:35 UTC (rev 3976) +++ trunk/coreboot-v2/src/arch/i386/boot/acpi.c 2009-03-06 17:24:29 UTC (rev 3977) @@ -202,7 +202,7 @@ ssdt->asl_compiler_revision = 42; ssdt->length = sizeof(acpi_header_t); - acpigen_set_current((unsigned char *) current); + acpigen_set_current((char *) current); current = acpi_fill_ssdt_generator(current, oem_table_id); /* recalculate length */ Modified: trunk/coreboot-v2/src/arch/i386/boot/multiboot.c =================================================================== --- trunk/coreboot-v2/src/arch/i386/boot/multiboot.c 2009-03-06 17:22:35 UTC (rev 3976) +++ trunk/coreboot-v2/src/arch/i386/boot/multiboot.c 2009-03-06 17:24:29 UTC (rev 3977) @@ -72,7 +72,7 @@ build_mb_mem_range_nooverlap(res->base, res->size); } -#define ROUND(_r,_a) ((_r) + (((_a) - 1)) & ~((_a) - 1)) +#define ROUND(_r,_a) (((_r) + (((_a) - 1))) & ~((_a) - 1)) unsigned long write_multiboot_info( unsigned long low_table_start, unsigned long low_table_end, @@ -81,12 +81,12 @@ struct multiboot_info *mbi; int i; - mbi = rom_table_end; + mbi = (struct multiboot_info *)rom_table_end; memset(mbi, 0, sizeof(*mbi)); rom_table_end += sizeof(*mbi); mbi->mmap_addr = (u32) rom_table_end; - mb_mem = rom_table_end; + mb_mem = (struct multiboot_mmap_entry *)rom_table_end; /* reserved regions */ reserved_mem[0].addr = low_table_start; @@ -111,5 +111,5 @@ printk_info("Multiboot Information structure has been written.\n"); - return mb_mem; + return (unsigned long)mb_mem; } Modified: trunk/coreboot-v2/src/arch/i386/boot/tables.c =================================================================== --- trunk/coreboot-v2/src/arch/i386/boot/tables.c 2009-03-06 17:22:35 UTC (rev 3976) +++ trunk/coreboot-v2/src/arch/i386/boot/tables.c 2009-03-06 17:24:29 UTC (rev 3977) @@ -182,7 +182,7 @@ #if CONFIG_MULTIBOOT /* The Multiboot information structure */ - mbi = rom_table_end; + mbi = (struct multiboot_info *)rom_table_end; rom_table_end = write_multiboot_info( low_table_start, low_table_end, rom_table_start, rom_table_end); Modified: trunk/coreboot-v2/src/arch/i386/smp/ioapic.c =================================================================== --- trunk/coreboot-v2/src/arch/i386/smp/ioapic.c 2009-03-06 17:22:35 UTC (rev 3976) +++ trunk/coreboot-v2/src/arch/i386/smp/ioapic.c 2009-03-06 17:24:29 UTC (rev 3977) @@ -55,11 +55,11 @@ { int i; unsigned long value_low, value_high; - unsigned long nvram = 0xfec00000; + unsigned long ioapicaddr = 0xfec00000; volatile unsigned long *l; struct ioapicreg *a = ioapicregvalues; - l = (unsigned long *) nvram; + l = (unsigned long *) ioapicaddr; #if defined(i786) /* For the pentium 4 and above apic deliver their interrupts * on the front side bus, enable that. Modified: trunk/coreboot-v2/src/cpu/x86/lapic/lapic_cpu_init.c =================================================================== --- trunk/coreboot-v2/src/cpu/x86/lapic/lapic_cpu_init.c 2009-03-06 17:22:35 UTC (rev 3976) +++ trunk/coreboot-v2/src/cpu/x86/lapic/lapic_cpu_init.c 2009-03-06 17:24:29 UTC (rev 3977) @@ -295,7 +295,7 @@ lapicid = lapic_read(LAPIC_ID) >> 24; - printk_debug("CPU %d going down...\n", lapicid); + printk_debug("CPU %ld going down...\n", lapicid); /* send an LAPIC INIT to myself */ lapic_write_around(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(lapicid)); Modified: trunk/coreboot-v2/src/cpu/x86/tsc/delay_tsc.c =================================================================== --- trunk/coreboot-v2/src/cpu/x86/tsc/delay_tsc.c 2009-03-06 17:22:35 UTC (rev 3976) +++ trunk/coreboot-v2/src/cpu/x86/tsc/delay_tsc.c 2009-03-06 17:24:29 UTC (rev 3977) @@ -104,6 +104,7 @@ unsigned long long start, end, delta; unsigned long result, count; + printk_spew("Calibrating delay loop...\n"); start = rdtscll(); // no udivdi3, dammit. // so we count to 1<< 20 and then right shift 20 @@ -127,10 +128,10 @@ delta >>= 20; // save this for microsecond timing. result = delta; - printk_spew("end %x, start %x\n", end, start); - printk_spew("32-bit delta %d\n", (unsigned long) delta); + printk_spew("end %llx, start %llx\n", end, start); + printk_spew("32-bit delta %ld\n", (unsigned long) delta); - printk_spew("%s 32-bit result is %d\n", + printk_spew("%s 32-bit result is %ld\n", __func__, result); return delta; @@ -143,7 +144,7 @@ { if (!clocks_per_usec) { clocks_per_usec = calibrate_tsc(); - printk_info("clocks_per_usec: %u\n", clocks_per_usec); + printk_info("clocks_per_usec: %lu\n", clocks_per_usec); } } Modified: trunk/coreboot-v2/src/devices/device.c =================================================================== --- trunk/coreboot-v2/src/devices/device.c 2009-03-06 17:22:35 UTC (rev 3976) +++ trunk/coreboot-v2/src/devices/device.c 2009-03-06 17:24:29 UTC (rev 3977) @@ -357,8 +357,7 @@ resource->flags &= ~IORESOURCE_STORED; base += size; - printk_spew( - "%s %02lx * [0x%08Lx - 0x%08Lx] %s\n", + printk_spew("%s %02lx * [0x%08Lx - 0x%08Lx] %s\n", dev_path(dev), resource->index, resource->base, -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
