Hi Samuel, samuel wrote: > r...@kopiluwak ~/bios/flashrom # ./flashrom -wv ../original_bios.bin > Calibrating delay loop... OK. > No coreboot table found. > Found chipset "Broadcom HT-1000", enabling flash write... OK. > Found chip "SST SST49LF080A" (1024 KB) at physical address 0xfff00000. > Flash image seems to be a legacy BIOS. Disabling checks. > Programming page: 0250 at address: 0x000fa000 > Verifying flash... FAILED at 0x000f0000! Expected=0x00, Read=0xff > > So I'm a bit stuck... Seems like there are motherboards that need > special modifications of flashrom to actually work?
Correct. This board needs what is called board enable for flashrom to function completely. We need to figure out where pin 8 on the flash chip is connected. It is the TBL# pin, which implements hardware write protect for the top 64KB of the chip. Hopefully it connects to a chip which we can find documentation for easily. Then the code is easy to add. Do you have access to a continuity tester? Please check this connection. Page 7 of http://www.sst.com/downloads/datasheet/S71235.pdf shows the flash chip pinout. //Peter -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
