Stefan Reinauer wrote:
On 27.03.2009 13:11 Uhr, Mondrian Nuessle wrote:
Hi,
as someone already pointed out, we need to enable flashing first on the board
using a GPIO pin.
I have attached a patch for flashrom that enables flashing on the HP DL145 G3.
I tested it on the DL145 I have here.
Please specify the board on the commandline, like in
# ./flashrom -m "hp:dl145_g3" -E
The patch is probably not ready for primetime, maybe someone can review it?
Regards, Mondrian
+static int board_hp_dl145_g3_enable(const char *name)
+{
+ uint8_t b;
+
+ outb(0x44, 0x0cd6);
+ b = inb(0x0cd7) | 0x24;
+ outb(b, 0x0cd7);
Any chance to find out what hardware is listening at 0xcd6/0xcd7?
Is that covered by PMBASE or GPIOBASE of the southbridge, or the SuperIO?
Stefan
The hardware listening on these ports is the BCM5785 (HT1000
southbridge). Basically, the code just controls 2 GPIO pins that are
connected to WP and TBL of the BIOS chip.
- Sven
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Sven Kapferer
University of Heidelberg - Computer Architecture Group
Address : B6 26, 68131 Mannheim, Germany
Web : http://www.cag.uni-hd.de
Email : [email protected]
Phone : +49 621 181 2720 Fax: +49 621 181 2713
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