On Tue, Jun 02, 2009 at 10:39:56AM -0600, Marc Jones wrote: > On Tue, Jun 2, 2009 at 9:57 AM, Ward Vandewege <[email protected]> wrote: > > Hey Marc et al, > > > > I just received a h8dmr box with quad core CPUs (2372HE) and 32GB of ram. I > > hacked up an h8dmr-fam10 patch which boots but still has tons of issues. > > Boot > > log here: > > > > http://ward.vandewege.net/coreboot/h8dmr/fam10/h8dmr-c.cap > > > > First problem is that it complains about not finding the microcode rev id. > > So > > I found the message below - did you ever get around to doing this? > > > > I also modified coreboot a little to print out the CPU version id (0x10042), > > which is not yet listed in amd/amdfam10/raminit_amdmct.c. > > > > We added for one of the C2 parts. It should be easy enough to add the other > one. > You will also need to change Options.lb for the C2 microcode. > Shanghai rev DA-C2: "mc_patch_0100009f.h" > > > A little further down in the log it seems I've got multiple cores talking at > > once so that's something else I'll need to figure out. > > > > Yes, that stuff should be fine.
s/fine/fixed/ you mean? > > > It does actually get all the way to CBFS, but hangs after loadking the first > > stage. There is also some slowness during/after ram detection. > > There is slowness around the cache disable / mem copy.. I think that > someone posted a fix to the list at one point. It would require some > searching. This one? http://www.coreboot.org/pipermail/coreboot/2008-October/040885.html Peter actually acked it, but it was never committed. That piece of the code has changed greatly in the past couple months though - the patch does not commit anymore. Thanks, Ward. -- Ward Vandewege <[email protected]> -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
