On Sat, Jun 6, 2009 at 6:56 AM, Ward Vandewege<[email protected]> wrote: > On Fri, Jun 05, 2009 at 11:49:02PM -0600, Marc Jones wrote: >> On Fri, Jun 5, 2009 at 6:50 PM, Ward Vandewege<[email protected]> wrote: >> > On Fri, Jun 05, 2009 at 04:00:57PM -0600, Marc Jones wrote: >> >> Patch for errata 327, 344, 346, 354. Three of those are HT errata so I >> >> hope that fixes the issue. >> > >> > Hmm, it doesn't yet. It still hangs in the same place, but it does a lot >> > more >> > iterations of that loop so I guess it gets further. Improvement, I guess? >> > >> > See >> > >> > http://ward.vandewege.net/coreboot/h8dmr/fam10/h8dmr-p.cap >> > >> > for the old output, and >> > >> > http://ward.vandewege.net/coreboot/h8dmr/fam10/h8dmr-q.cap >> > >> > for the output with your patch. Still using the much-more-verbose >> > >> > http://ward.vandewege.net/coreboot/h8dmr/fam10/init_cpus-n.c >> >> Ah, Maybe we were looking right at it.... Bit 10 520a and 530a is >> reserved in the C2. >> Updated the patch. Please try again. > > Still no dice - small differences in output though: > > http://ward.vandewege.net/coreboot/h8dmr/fam10/h8dmr-w.cap >
That sucks. The difference is in the table entry number of the skipped entry I added. I am worried that something needs to change in the HT init that we don't know about. I'll look some more this afternoon. Marc -- http://marcjonesconsulting.com -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
