On Tue, Jun 09, 2009 at 01:07:39PM -0600, Marc Jones wrote: > I have update the errata a little more. I don't see anything in the HT > init that would cause the issue. It may be a setting that we have to > find by checking against the vendor BIOS. > > There are new tables in the BKDG, 2.6.4.2.4.1 and .2 for buffer setup > that might have something to do with the problem. *shrug*
Hmm, this patch still didn't fix the problem for me. As per IRC, I did some dumping of lspci (etc) data from the proprietary bios: http://ward.vandewege.net/coreboot/h8dmr/fam10/h8dmr-fam10-proprietary-index.html and I added the pci dump lines you suggested. Here's a dump with them right before the loop where cpu 1 gets stuck: http://ward.vandewege.net/coreboot/h8dmr/fam10/h8dmr-ad.cap Sorry, that last file is a bit large (1.4MB). Now, just a sanity check: these CPUs are Quad-Core AMD Opteron(tm) Processor 2372 HE stepping 02 So adding this line 0x100f42, 0x1062, to get_equivalent_processor_rev_id in src/cpu/amd/model_10xxx/update_microcode.c, and pointing AMD_UCODE_PATCH_FILE to mc_patch_0100009f.h in src/mainboard/supermicro/h8dmr_fam10/Options.lb is definitely correct? Thanks, Ward. -- Ward Vandewege <[email protected]> -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
