Hi Zheng, On Wed, Jun 17, 2009 at 9:00 PM, Bao, Zheng<[email protected]> wrote: > > Hi, > Now I am trying the coreboot for family 10. But I found that the > linkOptimization()->selectOptimalWidthAndFrequency() in h2finit.c can > not set the "Optimized" width and frequency, because the > AMD_CB_Cpu2RCBLimits is NULL in amd_ht_init() in ht_wrapper.c. This > causes the HT bus Configuration can not be done. According to the > comment in mct_d.c, the requirement of mctSutoInitMCT_D() can not be > met. > > Does it mean currently the family 10 code can not work at all?
There are several people that have working (at varying levels) of Fam10 systems. So, most stuff does work. We knocked out a few bugs this week that should help more people get their configurations running. The AMD_CB_Cpu2RCBLimits is NULL because coreboot doesn't limit the HT frequency. The limit would be an upper limit not lower, since HT all start at 200MHz. The requirement in mctAutoInitMCT_D is that HT init be done and that includes the reset. coreboot should fail in the HT init phase if it can't be initialized and you wouldn't get to mctAutoInitMCT_D. Marc -- http://marcjonesconsulting.com -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
