> RAM end at 0x00200000 kB > Lower RAM end at 0x00200000 kB > Ram3 > Before starting clocks: Before memreset: cpu is pre_c0 > after first udelay
OK. So the timer worked for the first udelay... Does it only freeze when you have both CPUs enabled? Have you tried it with the no_smp patch again? I'm grasping at straws. Thanks, Myles -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
