Signed-off-by: Marc Bertens <[email protected]>
Part four for the Nokia IP530, This is the patch for hte devcetree.cb
file. Following changes where made;
- Disabled the floppy controller, due to the fact that its not present
on the board.
- Disabled tie parallel port, due to the fact that its not present on
the board.
- taken out the io, irq config of device 7 (PS2 keyb/mouse) it had not
effect anyways, and the controller is not used anyway, but it is
physical present on the board as a 4 pin sil header.
- Disabled the APCI of the superio, due to the fact that currently no
ACPI is supported by the current configuration of the Nokia IP530.
- Disabled the ACPI device of the southbridge, as above.
- Disabled the UBE device of the southbridge, as it has no connector on
the board.
- Set the ideX_driveY_udma33_enable to 1 to enable the UDMA33 option of
the southbridge (was tested with a 80Gb-WD and a CF 1Gb).
Remark: currently the CF that i used has the problem with DMA, and
therefor it takes Linux about 120 sec extra to boot. On a asus P4B
(orginal bios) this problem was not encountered. So therefor there must
be something be done extra in coreboot to fix that problem.
Marc
On Thu, 2010-05-27 at 12:30 +0200, mbertens wrote
>
> This is the patch for Kconfig, i have taken all unnessarry things out
> - back to default HEAP size
> - correct settings for the PIRQ table
> - with comments
>
> Marc
>
> On Thu, 2010-05-27 at 12:14 +0200, mbertens wrote:
>
> > Part two now the PIRQ table for the Nokia IP530.
> >
> > Changes made:
> > - rebuild the table to get th eNICs and PCMCIA controllers get there
> > correct IRQs assigned.
> > - Added a stub pirq_assign_irqs() due to the fact that it was missing at
> > compilation time. This was discussed with Rudolf Marek (ruik)
> > <[email protected]>
> >
> > Marc
> >
> >
> > On Thu, 2010-05-27 at 11:56 +0200, mbertens wrote:
> >
> > > Hi all,
> > >
> > > Here is the patch just for the pirq_routing() function. Its made
> > > specific to the CONFIG_NORTHBRIDGE_INTEL_440BX if that is to generic
> > > please replace by CONFIG_BOARD_NOKIA_IP530.
> > >
> > > Put the following extras in the file;
> > > - added header accordingly "Common License Header" that was missing.
> > > - corrected a printk() warning of the compiler.
> > > - added the correction for the i440BX by AND the link value with 0x5F
> > > so that always the value is kept below 0x5F. That AND value should be
> > > 0x03 i think because the link value cannot be greater than 3. But i'm
> > > not sure about that, thats why i used the current solution.
> > >
> > > The other patches will follow to day.
> > >
> > > Marc
> > >
> > >
> > >
> > > On Wed, 2010-05-26 at 15:14 -0600, Myles Watson wrote:
> > > > On Wed, May 26, 2010 at 2:15 PM, mbertens <[email protected]> wrote:
> > > > > On Wed, 2010-05-26 at 11:00 -0600, Myles Watson wrote:
> > > > >> + // fix made by Marc Bertens
> > > > >> <[email protected]>
> > > > >> + if (link > 0x5f) {
> > > > >> + // This is basically for the 440BX
> > > > >> + link -= 0x5f;
> > > > >> + }
> > > > >>
> > > > >> I'd prefer this to be guarded by
> > > > >> #if CONFIG_NORTHBRIDGE_INTEL_440BX (or whatever the correct one is)
> > > > > I was thinking of it to put it that way, but i'd. But i will make the
> > > > > changes to the code.
> > > > >>
> > >
Index: src/mainboard/nokia/ip530/devicetree.cb
===================================================================
--- src/mainboard/nokia/ip530/devicetree.cb (revision 5593)
+++ src/mainboard/nokia/ip530/devicetree.cb (working copy)
@@ -29,17 +29,17 @@
device pci 1.0 on end # PCI/AGP bridge
chip southbridge/intel/i82371eb # Southbridge
device pci 7.0 on # ISA bridge
- chip superio/smsc/smscsuperio # Super I/O (SMSC FDC37C878)
- device pnp 3f0.0 on # Floppy
- io 0x60 = 0x3f0
- irq 0x70 = 6
- drq 0x74 = 2
- end
- device pnp 3f0.3 on # Parallel port
- io 0x60 = 0x378
- irq 0x70 = 7
- drq 0x74 = 4
- end
+ chip superio/smsc/smscsuperio # Super I/O FDC 37C878
+ # Fix made by Marc Bertens <[email protected]>
+ # due to the fact that no connector for the Floppy is on the board
+ # the FDD controller is disabled.
+ device pnp 3f0.0 off # Floppy
+ end
+ # Fix made by Marc Bertens <[email protected]>
+ # due to the fact that no connector for the LPT device is on the board
+ # the LPT controller is disabled.
+ device pnp 3f0.3 off # Parallel port
+ end
device pnp 3f0.4 on # COM1
io 0x60 = 0x3f8
irq 0x70 = 4
@@ -49,46 +49,37 @@
irq 0x70 = 3
end
device pnp 3f0.7 on # PS/2 keyboard / mouse
- io 0x60 = 0x60
- io 0x62 = 0x64
- irq 0x70 = 1 # PS/2 keyboard interrupt
- irq 0x72 = 12 # PS/2 mouse interrupt
end
- device pnp 3f0.9 on # Game port
- io 0x60 = 0x201
+ device pnp 3f0.6 on # RTC
+ io 0x62 = 0x0072
+ irq 0x70 = 8
+ irq 0xF0 = 16
end
- device pnp 3f0.a on # Power-management events (PME)
- io 0x60 = 0x600
+ device pnp 3f0.8 on # AUX I/O
end
- device pnp 3f0.b on # MIDI port (MPU-401)
- io 0x60 = 0x330
- irq 0x70 = 5
+ # Fix made by Marc Bertens <[email protected]>
+ # due to the fact that currently ACPI not is supported for this board
+ # ACPI is disabled.
+ device pnp 3f0.A off # ACPI
end
end
end
device pci 7.1 on end # IDE
- device pci 7.2 on end # USB
- device pci 7.3 on end # ACPI
+ # Fix made by Marc Bertens <[email protected]>
+ # due to to the fact the USB not has a connector it being disabled
+ device pci 7.2 off end # USB
+ # Fix made by Marc Bertens <[email protected]>
+ # due to the fact that currently ACPI not is supported for this board
+ # ACPI is disabled.
+ device pci 7.3 off end # ACPI
register "ide0_enable" = "1"
register "ide1_enable" = "1"
register "ide_legacy_enable" = "1"
# Enable UDMA/33 for higher speed if your IDE device(s) support it.
- register "ide0_drive0_udma33_enable" = "0"
- register "ide0_drive1_udma33_enable" = "0"
- register "ide1_drive0_udma33_enable" = "0"
- register "ide1_drive1_udma33_enable" = "0"
+ register "ide0_drive0_udma33_enable" = "1"
+ register "ide0_drive1_udma33_enable" = "1"
+ register "ide1_drive0_udma33_enable" = "1"
+ register "ide1_drive1_udma33_enable" = "1"
end
- device pci 0d.0 on end # NIC (DEC DECchip 21142/43)
- device pci 0e.0 on end # NIC (DEC DECchip 21142/43)
- device pci 0f.0 on end # CardBus bridge (TI PCI1225)
- device pci 0f.1 on end # CardBus bridge (TI PCI1225)
end
- device pci_domain 1 on # PCI domain 1
- device pci 00.0 on end # PCI bridge (DEC DECchip 21150)
- end
- device pci_domain 2 on # PCI domain 2
- device pci 04.0 on end # NIC (DECchip 21142/43)
- device pci 04.0 on end # NIC (DECchip 21142/43)
- end
end
-
--
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