Enable TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 by default. Without this set, almost all boards use the inb(0x80) method. Unfortunately, that method takes over a second to calibrate, and it's results are not as reliable.
There is a chance that some boards may not work well with the timer2 method. This is likely rare, because both libpayload and seabios use the timer2 method unconditionally and there has not been reports of an issue. Should a board not support the more accurate timer2 mechanism, it will need to be updated to actively disable it. Signed-off-by: Kevin O'Connor <[email protected]> --- src/cpu/x86/Kconfig | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index 325991e..8cd999e 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -21,7 +21,7 @@ config UDELAY_TSC config TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 bool - default n + default y config XIP_ROM_BASE hex -- 1.7.2.2 -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
