On Tue, Sep 07, 2010 at 09:07:36AM +0200, Patrick Georgi wrote: > Am 07.09.2010 01:23, schrieb Kevin O'Connor: > > Enable TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 by default. Without this > > set, almost all boards use the inb(0x80) method. Unfortunately, that > > method takes over a second to calibrate, and it's results are not as > > reliable. > > > > There is a chance that some boards may not work well with the timer2 > > method. This is likely rare, because both libpayload and seabios use > > the timer2 method unconditionally and there has not been reports of an > > issue. Should a board not support the more accurate timer2 mechanism, > > it will need to be updated to actively disable it. > How about this instead? It allows boards that require the workaround to > simply "select" it. > > Signed-off-by: Patrick Georgi <[email protected]>
That looks like a better approach. Acked-by: Kevin O'Connor <[email protected]> As an aside, I'm not sure of the value of TSC based delays if inb(0x80) is used to time it. If the code assumes inb(0x80) is 1 usecond, I'd think it could as easily use UDELAY_IO instead. I guess we'll need to see if any boards need the new TSC_CALIBRATE_WITH_IO setting. -Kevin -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
