Hi,
Please find the latest report on new defect(s) introduced to coreboot found
with Coverity Scan.
2 new defect(s) introduced to coreboot found with Coverity Scan.
2 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent
build analyzed by Coverity Scan.
New defect(s) Reported-by: Coverity Scan
Showing 2 of 2 defect(s)
** CID 1365977: Null pointer dereferences (FORWARD_NULL)
/src/soc/intel/common/lpss_i2c.c: 541 in lpss_i2c_gen_config_rise_fall_time()
________________________________________________________________________________________________________
*** CID 1365977: Null pointer dereferences (FORWARD_NULL)
/src/soc/intel/common/lpss_i2c.c: 541 in lpss_i2c_gen_config_rise_fall_time()
535 printk(BIOS_ERR, "lpss_i2c: invalid bus speed %d\n",
536 config->speed);
537 return -1;
538 }
539
540 if (soc == NULL) {
>>> CID 1365977: Null pointer dereferences (FORWARD_NULL)
>>> Dereferencing null pointer "soc".
541 printk(BIOS_ERR, "lpss_i2c: invalid SoC clock speed %d
MHz\n",
542 soc->clk_speed_mhz);
543 return -1;
544 }
545
546 /* Get the proper spike suppression count based on target
speed. */
** CID 1365976: (CONSTANT_EXPRESSION_RESULT)
/src/soc/rockchip/rk3399/clock.c: 673 in rkclk_i2c_clock_for_bus()
/src/soc/rockchip/rk3399/clock.c: 677 in rkclk_i2c_clock_for_bus()
/src/soc/rockchip/rk3399/clock.c: 681 in rkclk_i2c_clock_for_bus()
________________________________________________________________________________________________________
*** CID 1365976: (CONSTANT_EXPRESSION_RESULT)
/src/soc/rockchip/rk3399/clock.c: 673 in rkclk_i2c_clock_for_bus()
667 case 4:
668 write32(&pmucru_ptr->pmucru_clksel[3],
669 PMU_I2C_CLK_REG_VALUE(4, src_clk_div));
670 break;
671 case 5:
672 write32(&cru_ptr->clksel_con[61],
>>> CID 1365976: (CONSTANT_EXPRESSION_RESULT)
>>> "((65280 /* (I2C_DIV_CON_MASK << CLK_I2C5_DIV_CON_SHIFT) |
>>> (CLK_I2C_PLL_SEL_MASK << CLK_I2C5_PLL_SEL_SHIFT) */) | ((src_clk_div - 1 <<
>>> CLK_I2C5_DIV_CON_SHIFT) | (32768 /* CLK_I2C_PLL_SEL_GPLL <<
>>> CLK_I2C5_PLL_SEL_SHIFT */))) << 16" is 0xffffffffff000000 regardless of the
>>> values of its operands. This occurs as the bitwise first operand of "|".
673 I2C_CLK_REG_VALUE(5, src_clk_div));
674 break;
675 case 6:
676 write32(&cru_ptr->clksel_con[62],
677 I2C_CLK_REG_VALUE(6, src_clk_div));
678 break;
/src/soc/rockchip/rk3399/clock.c: 677 in rkclk_i2c_clock_for_bus()
671 case 5:
672 write32(&cru_ptr->clksel_con[61],
673 I2C_CLK_REG_VALUE(5, src_clk_div));
674 break;
675 case 6:
676 write32(&cru_ptr->clksel_con[62],
>>> CID 1365976: (CONSTANT_EXPRESSION_RESULT)
>>> "((65280 /* (I2C_DIV_CON_MASK << CLK_I2C6_DIV_CON_SHIFT) |
>>> (CLK_I2C_PLL_SEL_MASK << CLK_I2C6_PLL_SEL_SHIFT) */) | ((src_clk_div - 1 <<
>>> CLK_I2C6_DIV_CON_SHIFT) | (32768 /* CLK_I2C_PLL_SEL_GPLL <<
>>> CLK_I2C6_PLL_SEL_SHIFT */))) << 16" is 0xffffffffff000000 regardless of the
>>> values of its operands. This occurs as the bitwise first operand of "|".
677 I2C_CLK_REG_VALUE(6, src_clk_div));
678 break;
679 case 7:
680 write32(&cru_ptr->clksel_con[63],
681 I2C_CLK_REG_VALUE(7, src_clk_div));
682 break;
/src/soc/rockchip/rk3399/clock.c: 681 in rkclk_i2c_clock_for_bus()
675 case 6:
676 write32(&cru_ptr->clksel_con[62],
677 I2C_CLK_REG_VALUE(6, src_clk_div));
678 break;
679 case 7:
680 write32(&cru_ptr->clksel_con[63],
>>> CID 1365976: (CONSTANT_EXPRESSION_RESULT)
>>> "((65280 /* (I2C_DIV_CON_MASK << CLK_I2C7_DIV_CON_SHIFT) |
>>> (CLK_I2C_PLL_SEL_MASK << CLK_I2C7_PLL_SEL_SHIFT) */) | ((src_clk_div - 1 <<
>>> CLK_I2C7_DIV_CON_SHIFT) | (32768 /* CLK_I2C_PLL_SEL_GPLL <<
>>> CLK_I2C7_PLL_SEL_SHIFT */))) << 16" is 0xffffffffff000000 regardless of the
>>> values of its operands. This occurs as the bitwise first operand of "|".
681 I2C_CLK_REG_VALUE(7, src_clk_div));
682 break;
683 case 8:
684 write32(&pmucru_ptr->pmucru_clksel[2],
685 PMU_I2C_CLK_REG_VALUE(8, src_clk_div));
686 break;
________________________________________________________________________________________________________
To view the defects in Coverity Scan visit,
https://u2389337.ct.sendgrid.net/wf/click?upn=08onrYu34A-2BWcWUl-2F-2BfV0V05UPxvVjWch-2Bd2MGckcRbLuoVetFLSjdonCi1EjfHRqWGQvojmmkYaBE-2BPJiTQvQ-3D-3D_q4bX76XMySz3BXBlWr5fXXJ4cvAsgEXEqC7dBPM7O5Y8U2R9DZ9HubMW2Jm1B8Dkg2e842CrerRxVktdM2ADG1oluDFBx0halVUsYTUT4St5u4kFck8FLFn0ETkK1lJLwiaPf5UP6rjwYw3gp6FEYsEFJotbXl8L-2FzQf-2B8Vu-2BsksjkRcooAY2ZYd0ORT6fDcZF5b6AGuyCaZ4uPOGUNurYQacA4geFu0o0IP2g0YqY4-3D
To manage Coverity Scan email notifications for "coreboot@coreboot.org", click
https://u2389337.ct.sendgrid.net/wf/click?upn=08onrYu34A-2BWcWUl-2F-2BfV0V05UPxvVjWch-2Bd2MGckcRbVDbis712qZDP-2FA8y06Nq4e-2BpBzwOa5gzBZa9dWpDbzfofODnVj1enK2UkK0-2BgCCqyeem8IVKvTxSaOFkteZFcnohwvb2rnYNjswGryEWCURnUk6WHU42sbOmtOjD-2Bx5c-3D_q4bX76XMySz3BXBlWr5fXXJ4cvAsgEXEqC7dBPM7O5Y8U2R9DZ9HubMW2Jm1B8Dkt2xncz9-2B0fM-2BexJKfTWANtgKb61RgDIMU5LNPBSe8KP7c01E1rCCV2gGqPznPWOifaG-2F-2BH4zZRC8U1s8MElnpxdnSkp-2BzjvkEBVrBkN8Qui6RjuQeAM0N7TP1whI1SRa2LepE-2Fb0aDZNraWCFEyybQtWKS38-2FVwmCBvD0rpINuk-3D
--
coreboot mailing list: coreboot@coreboot.org
https://www.coreboot.org/mailman/listinfo/coreboot
