What will CoreBoot do if it runs out of room in the PCI_MMIO region? On Fri, Jan 5, 2018 at 8:49 AM, Adam Talbot <[email protected]> wrote:
> "linear address space" != DRAM, got it. > > Interesting. > VGA compatible controller: NVIDIA Corporation GP104 [GeForce GTX 1070] > (rev a1) (prog-if 00 [VGA controller]) > Subsystem: NVIDIA Corporation GP104 [GeForce GTX 1070] > Flags: bus master, fast devsel, latency 0, IRQ 325 > Memory at d8000000 (32-bit, non-prefetchable) [size=16M] > Memory at c0000000 (64-bit, prefetchable) [size=256M] > Memory at b8000000 (64-bit, prefetchable) [size=32M] > I/O ports at b000 [size=128] > [virtual] Expansion ROM at d9000000 [disabled] [size=512K] > > So it looks like the current GP104 chips take 256M+16M+32M (304M). > > A few of the mining specific BIOS's have an "above 4G decoding." Now I > understand why this is required. > > So what would happen if I tweaked CoreBoot so it did not map VGA devices? > Would the Linux kernel clean up the mess? I have no problems doing > everything over serial console. >
-- coreboot mailing list: [email protected] https://mail.coreboot.org/mailman/listinfo/coreboot

