Dear coreboot community, I am experiencing problems with FSP Memory Init on Braswell SoCs. FSP Memory Init is not returning. I have following processors that fail: Celeron J3060 and Celeron J3160; both have the same issue.
The platform has 1 SODIMM module on channel 0. I am feeding the UPD header with correct SPD, but still no luck. I have also tried FSP MR1 and MR2, but nothing works. Is anyone here more experienced with Braswell platforms? Could You give me some advices? Best regards, -- Michał Żygowski Embedded Systems Engineer http://3mdeb.com | @3mdeb_com _______________________________________________ coreboot mailing list -- [email protected] To unsubscribe send an email to [email protected]
