The OSD appears shifted for just a frame time and then goes back. It seems
to occur most often when I am moving data with memcpy.

That is exactly what I see if I do a memcpy on the dsp (if I don't do
the change to PBBPR register)

I am at a loss as to what to do next!

Try to change the PR_OLD_COUNT on PBBPR register to set the number of
transfers that must be made before the DDR2 memory controller raises
the priority of the oldest command.

Changing PR_OLD_COUNT value from 0x20 to 0x10 solved the problem for me!!!

Thanks and regards,
Carlos
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