Hello all,
I had the same problems and concluded that the watchdog reset
couldn't replace a hardware reset (e.g. in reading the config pins).
I use two diodes and a resistor connected between J6 and P6 to perform
a remote hard reset via the UART port.
Cheers
Rudy
 

> -----Original Message-----
> From: [EMAIL PROTECTED] 
> [mailto:[EMAIL PROTECTED]
] On Behalf Of Peter Wippich
> Sent: 30 December 2006 16:47
> To: Sweta
> Cc: [email protected]
> Subject: Re: Problem in resetting Davinci processor from 
> watchdog Timer
> 
> 
> Hi Sweta, 
> 
> how about returning the bad board to TI and requesting a 
> replacement unit ;-). 
> 
> Sorry, but I don't have a solution. 
> 
> Ciao, 
> 
> Peter 
> 
> On Fri, 29 Dec 2006, Sweta wrote:
> 
> > Hi Peter,
> > I tried with the same code but it didn't work.
> > Then I came to know that there is a slicon bug so it 
> doesn't  actually 
> > reset the processor through watchdog.
> > Then I tried with the workaround which is the code I mentioned in 
> > previous mail.
> > Perviously on one of the board it was working but on other 
> board, same 
> > kernel image doesn't perform reboot.
> > So what can be the solution  ?
> > 
> > Thanks,
> > Sweta
> >  
> > Peter Wippich wrote:
> > 
> >  Hi Sweta,
> > 
> > here is the code from the 2.6.19 kernel. Maybe this helps : 
> > 
> > void davinci_watchdog_reset(void) {
> >     volatile davinci_timer_regs_t *davinci_wdt = 
> >             (volatile davinci_timer_regs_t 
> *)IO_ADDRESS(DAVINCI_WDOG_BASE);
> > 
> >     davinci_wdt->tcr = 0x0;         /* disable timer */
> >     davinci_wdt->tgcr = 0x0;        /* reset timer */
> >         davinci_wdt->tgcr = 0x8;    /* configure timer2 as 64-bit */
> >         davinci_wdt->tgcr |= 0x3;   /* release timer from reset */
> >     davinci_wdt->tim12 = 0;         /* clear counter and 
> period regs */
> >     davinci_wdt->tim34 = 0;
> >     davinci_wdt->prd12 =  0;
> >     davinci_wdt->prd34 =  0;
> >     davinci_wdt->wdtcr |= 0x4000;   /* enable watchdog timer */
> > 
> >     /* put watchdog in pre-active state */
> >     davinci_wdt->wdtcr = 0xA5C64000;
> > 
> >     /* put watchdog in active state */
> >     davinci_wdt->wdtcr = 0xDA7E4000;
> > 
> >     /* write an invalid value to the WDKEY field to trigger
> >      * a watchdog reset */
> >     davinci_wdt->wdtcr = 0x00004000;
> > }
> > 
> > 
> > On Fri, 29 Dec 2006, [EMAIL PROTECTED] wrote:
> > 
> >   
> > 
> >  Hi Peter,
> > I m using Montavista Linux 2.6.10 (mvl402).
> > reboot code as mentioned in mail is executed properly.but 
> then after 
> > this line davinci_wdt->wdtcr = 0x00004000;, it doesn't execute next 
> > statement (I tried with putting printk statement after it).
> > Doe it mean that it resets watchdog correctly.
> > But then it doesn't reset the processor & doesn't start 
> execution of 
> > UBL code again.
> > What can be the problem ?
> > Thanks,
> > Sweta
> >     
> > 
> >  Hi Sweta,
> > 
> > which kernel are you using ?? It works with the 2.6.19 
> Kernel from GIT 
> > tree.
> > 
> > Ciao,
> > 
> > Peter
> > 
> > On Thu, 28 Dec 2006, [EMAIL PROTECTED] wrote:
> > 
> >       
> > 
> >  Hi All,
> > I want to reset the Davinci pocessor using watchdog timer.
> > So when I give reboot command from kernel, it hangs & 
> doesn't actually 
> > reset the processor.
> > code for watchdog rest in kernel is as follows :
> > void davinci_watchdog_reset(void) {
> >         volatile davinci_timer_regs_t *davinci_wdt = (volatile 
> > davinci_timer_regs_t *)IO_ADDRESS(DAVINCI_WDOG_BASE);
> >         davinci_wdt->tcr = 0x0;         /* disable timer */
> >         davinci_wdt->tgcr = 0x0;        /* reset timer */
> >         davinci_wdt->tgcr = 0x8;        /* configure timer2 
> as 64-bit */
> >         davinci_wdt->tgcr |= 0x3;       /* release timer 
> from reset */
> >         davinci_wdt->tim12 = 0;         /* clear counter 
> and period regs
> > */
> >         davinci_wdt->tim34 = 0;
> >         davinci_wdt->prd12 =  0;
> >         davinci_wdt->prd34 =  0;
> >         davinci_wdt->tcr   |= 0x00000040;
> >         davinci_wdt->wdtcr |= 0x4000;   /* enable watchdog timer */
> > 
> >         *(volatile unsigned int *)(0x01c41a20) = 0x00000000;
> > 
> >         /* put watchdog in pre-active state */
> >        davinci_wdt->wdtcr = 0xA5C64000;
> > 
> >        /* put watchdog in active state */
> >        davinci_wdt->wdtcr = 0xDA7E4000;
> > 
> >       /* write an invalid value to the WDKEY field to trigger* a 
> > watchdog reset */
> >           davinci_wdt->wdtcr = 0x00004000;
> > 
> > }
> > 
> > But it hangs & doesn't actually reset the processor.
> > I tried with reset commnad from u-boot loader also. It also 
> gives me 
> > the same  result.
> > Can anyone Help me out to debug what is wrong ?
> > 
> > Thanks in advance,
> > -Sweta
> > 
> >         
> > 
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> >  |       Peter Wippich                   Voice: +49 30 
> 46776411          |
> > |       G&W Instruments GmbH            fax:   +49 30 
> 46776419          |
> > |       Gustav-Meyer-Allee 25, Geb. 12  Email: 
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> > |       D-13355 Berlin  / Germany                           
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> 
> |       Peter Wippich                   Voice: +49 30 
> 46776411          |
> |       G&W Instruments GmbH            fax:   +49 30 
> 46776419          |
> |       Gustav-Meyer-Allee 25, Geb. 12  Email: 
> [EMAIL PROTECTED]   |
> |       D-13355 Berlin  / Germany                             
>           |
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