Sudhakar,
I could not verify the error message "too much work for irq xx" when
running "tack" on a DM6467. Could you please specify the exact command
line parameters/test to run, inorder to reproduce this error.
Thanks and Regards,
Philby
On Fri, 2008-11-14 at 09:57 +0530, Rajashekhara, Sudhakar wrote:
> Kevin,
>
> It's true that this behavior is seen across all DM6467 EVMs. If this
> fix is not present then the terminal shows up error messages like "too
> much work for irq xx". After the EVM boots up, you can run the "tack"
> command to test this.
>
> I am not in office today. I can work on the patch on Monday to change the
> hardcoded value of 0x8.
>
> Regards, Sudhakar
>
> ________________________________________
> From: [EMAIL PROTECTED] [EMAIL PROTECTED] On Behalf Of Kevin Hilman [EMAIL
> PROTECTED]
> Sent: Friday, November 14, 2008 6:10 AM
> To: Steve Chen
> Cc: [email protected]
> Subject: Re: [PATCH v5 09/10] ARM: DaVinci: serial mis-behavior on dm646x
>
> Steve Chen <[EMAIL PROTECTED]> writes:
>
> > Kevin,
> >
> > I noticed the following code in your patch
> > +
> > + if (cpu_is_davinci_dm646x())
> > + davinci_serial_outb(p, UART_DM646X_SCR, 0x8);
> >
> > You want to use writel. Less than 32bit Writes to the UART controller
> > locks up the ARM core.
> >
>
> Thanks for the check! With that info, I reworked the patch (see
> below) and just make all the serial writes at init time use 32-bit
> writes. Then there's a single reset function which works for all
> chips, with a special case for dm6467.
>
> Any objectsions?
>
> Kevin
>
>
> >
> > On Thursday 13 November 2008 16:15:36 Kevin Hilman wrote:
> >> Steve Chen <[EMAIL PROTECTED]> writes:
> >>
> >> > Kevin,
> >> >
> >> > On Thursday 13 November 2008 13:17:39 Kevin Hilman wrote:
> >> >> Is this misbehavior specific to the DM6467 EVM or common to any DM6467
> >> >> board? The patch description could be a bit more descriptive in the
> >> >> future.
> >> > Last month, someone posted on the mailing list about UART2 not working
> >> > his
> >> > custom board. As it turns out, he needed this same fix for UART2, so
> >> > this is
> >> > a generic dm6467 issue.
> >>
> >> OK, thanks for the clarification. That's what I was expecting. Then
> >> doing this in board init code is definitely wrong.
> >>
> >> > Also, this patch only fixes UART0. Do we want to consider something more
> >> > generic that addresses all three UARTs.
> >>
> >> Yes, I'd like to see something more generic.
> >>
> >> The 2nd patch I sent is an attempt at doing something more generic,
> >> but it doesn't boot. Since the initial mis-behavior was not well
> >> described in the initial patch, I'm hoping someone (like you :) might
> >> be able to shed some light on why my solution doesn't work.
> >>
> >> Kevin
> >>
>
>
> >From 45ab9e55aecb73472bd5f682cc68768df172bf11 Mon Sep 17 00:00:00 2001
> From: Kevin Hilman <[EMAIL PROTECTED]>
> Date: Thu, 13 Nov 2008 11:10:04 -0800
> Subject: [PATCH] DaVinci: DM646x: move serial reset from board code to chip
> code
>
> Signed-off-by: Kevin Hilman <[EMAIL PROTECTED]>
> ---
> arch/arm/mach-davinci/board-dm646x-evm.c | 14 -----------
> arch/arm/mach-davinci/serial.c | 36 ++++++++++++++---------------
> 2 files changed, 17 insertions(+), 33 deletions(-)
>
> diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c
> b/arch/arm/mach-davinci/board-dm646x-evm.c
> index b6a2b22..f311f52 100644
> --- a/arch/arm/mach-davinci/board-dm646x-evm.c
> +++ b/arch/arm/mach-davinci/board-dm646x-evm.c
> @@ -117,20 +117,6 @@ static void __init evm_init_i2c(void)
> i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
> }
>
> -#define UART_DM646X_SCR (DAVINCI_UART0_BASE + 0x40)
> -/*
> - * Internal UARTs need to be initialized for the 8250 autoconfig to work
> - * properly. Note that the TX watermark initialization may not be needed
> - * once the 8250.c watermark handling code is merged.
> - */
> -static int __init dm646x_serial_reset(void)
> -{
> - davinci_writel(0x08, UART_DM646X_SCR);
> -
> - return 0;
> -}
> -late_initcall(dm646x_serial_reset);
> -
> static void board_init(void)
> {
> davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DM646X_LPSC_AEMIF, 1);
> diff --git a/arch/arm/mach-davinci/serial.c b/arch/arm/mach-davinci/serial.c
> index 1a08ef5..9198978 100644
> --- a/arch/arm/mach-davinci/serial.c
> +++ b/arch/arm/mach-davinci/serial.c
> @@ -37,27 +37,22 @@
> #include "clock.h"
>
> #define UART_DAVINCI_PWREMU 0x0c
> +#define UART_DM646X_SCR 0x10
> +
> #define DM355_UART2_BASE (0x01E06000)
>
> -static inline unsigned int davinci_serial_in(struct plat_serial8250_port *up,
> - int offset)
> +static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
> + int offset)
> {
> offset <<= up->regshift;
> - return (unsigned int)__raw_readb(up->membase + offset);
> -}
> -
> -static inline void davinci_serial_outb(struct plat_serial8250_port *p,
> - int offset, int value)
> -{
> - offset <<= p->regshift;
> - __raw_writeb(value, p->membase + offset);
> + return (unsigned int)__raw_readl(up->membase + offset);
> }
>
> -static inline void davinci_serial_outs(struct plat_serial8250_port *p,
> - int offset, int value)
> +static inline void serial_write_reg(struct plat_serial8250_port *p, int
> offset,
> + int value)
> {
> offset <<= p->regshift;
> - __raw_writew(value, p->membase + offset);
> + __raw_writel(value, p->membase + offset);
> }
>
> static struct plat_serial8250_port serial_platform_data[] = {
> @@ -103,17 +98,21 @@ static struct platform_device serial_device = {
>
> static void __init davinci_serial_reset(struct plat_serial8250_port *p)
> {
> - /* reset both transmitter and receiver: bits 14,13 = UTRST, URRST */
> unsigned int pwremu = 0;
>
> - davinci_serial_outb(p, UART_IER, 0); /* disable all interrupts */
> + serial_write_reg(p, UART_IER, 0); /* disable all interrupts */
>
> - davinci_serial_outs(p, UART_DAVINCI_PWREMU, pwremu);
> + /* reset both transmitter and receiver: bits 14,13 = UTRST, URRST */
> + serial_write_reg(p, UART_DAVINCI_PWREMU, pwremu);
> mdelay(10);
>
> pwremu |= (0x3 << 13);
> pwremu |= 0x1;
> - davinci_serial_outs(p, UART_DAVINCI_PWREMU, pwremu);
> + serial_write_reg(p, UART_DAVINCI_PWREMU, pwremu);
> +
> + if (cpu_is_davinci_dm646x()) {
> + serial_write_reg(p, UART_DM646X_SCR, 0x08);
> + }
> }
>
> void __init davinci_serial_init(void)
> @@ -166,8 +165,7 @@ void __init davinci_serial_init(void)
> __func__, __LINE__, i);
> else {
> clk_enable(uart_clk);
> - if (cpu_is_davinci_dm644x() || cpu_is_davinci_dm355())
> - davinci_serial_reset(p);
> + davinci_serial_reset(p);
> }
> }
> }
> --
> 1.6.0.3
>
>
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