On Sunday 14 December 2008, R. Simning wrote: > in chapter 11, section 11.1.1 (page 150), i have found that nand > devices supported allows a maximum page size of 2048 bytes.
Supported by the ROM boot loader. I don't think there's any way the hardware is preventing a 4K page size ... it's all handled by software. You should be able to use that chip ... just not boot from it. (Unless TI can get you DM355 parts with an updated RBL. I could believe those are coming, given the two RBL+NAND issues listed in the errata document.) > Because this new nand device has a page size of 4096 bytes, > and I think this may be the problem I am having. One issue is that <linux/mtd/nand.h> defines /* This constant declares the max. oobsize / page, which * is supported now. If you add a chip with bigger oobsize/page * adjust this accordingly. */ #define NAND_MAX_OOBSIZE 64 #define NAND_MAX_PAGESIZE 2048 So you'd need to change that to use a bigger page size. - Dave _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
