On Wednesday 17 December 2008, Maupin, Chase wrote: > In my testing that was enough to support 4K nand pages. > The only other thing that needed to change was that in > nand_ids.c the older NAND chips can share the same device > id as the new one. Thus the new NAND chip is detected > incorrectly and the page size is wrong. i.e. for Samsung > the NAND id for the 512MB nand chip was 0xd5 and the id > for the new chip was 0xD5. Since these are hex values > the new chip was mistakenly detected as a 512MB part.
I don't follow; 0xd5 == 0xD5, yes? So the issue is surely that a single byte code wasn't enough, and some other byte(s) were needed... > You may need to comment out the old part. > > Lastly, there is a limitation in the nand_base.c code > of 2GB for the total size of the nand chip. This is > because they use a signed value for the offset which > causes bit extension during calculation of the nand > chip to use for the offset. Assuming this was fixed > there is then a 4GB limitation in the MTD subsystem. Hmm, that sounds a bit harder to fix. > Still, to at least get 2GB of NAND with 4K page sizes > all I needed to do was update the nand_ids.c file and > increase the NAND_MAX_OOBSIZE variable to 128. Sounds to me like it'd be worth at least packaging a partial patch and sending it to the MTD crew, with explicit description of its limitations. In the best of worlds someone will say "here's a better patch" in return mail. In the worst case, you'd at least be seeding the process of getting a Real Fix. - Dave _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
