On Thu, Feb 26, 2009 at 09:41:05AM -0800, Kevin Hilman wrote:
> "Mark A. Greer" <[email protected]> writes:
>
> > From: Mark A. Greer <[email protected]>
> >
> > Currently the davinci code assumes that the pinmux base register
> > address is the same for all davinci SoCs. This is no longer true
> > so set the pinmux base register address based on the SoC type.
> >
> > Signed-off-by: Mark A. Greer <[email protected]>
>
> In addition to Dave's comment, minor formatting nitpick below...
> > diff --git a/arch/arm/mach-davinci/mux.c b/arch/arm/mach-davinci/mux.c
> > index 9e3e31b..9bff545 100644
> > --- a/arch/arm/mach-davinci/mux.c
> > +++ b/arch/arm/mach-davinci/mux.c
> > @@ -21,6 +21,7 @@
> >
> > #include <mach/hardware.h>
> > #include <mach/mux.h>
> > +#include <mach/common.h>
> >
> > static const struct mux_config *mux_table;
> > static unsigned long pin_table_sz;
> > @@ -40,7 +41,6 @@ int __init davinci_mux_register(const struct mux_config
> > *pins,
> > int __init_or_module davinci_cfg_reg(const unsigned long index)
> > {
> > static DEFINE_SPINLOCK(mux_spin_lock);
> > - void __iomem *base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
>
> Minor formatting nitpick... how about leaving the base here, but doing
>
> void __iomem *base = davinci_soc_info->mux_base;
>
> That way you don't have to line-wrap the read/write statements below.
Sure.
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