From: Mark A. Greer <[email protected]> Currently the davinci code assumes that the pinmux base register address is the same for all davinci SoCs. This is no longer true so set the pinmux base register address based on the SoC type.
Signed-off-by: Mark A. Greer <[email protected]> --- arch/arm/mach-davinci/dm355.c | 2 ++ arch/arm/mach-davinci/dm644x.c | 2 ++ arch/arm/mach-davinci/dm646x.c | 2 ++ arch/arm/mach-davinci/include/mach/common.h | 1 + arch/arm/mach-davinci/mux.c | 11 +++++++---- 5 files changed, 14 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index d6086d5..1e446ee 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -13,6 +13,7 @@ #include <linux/clk.h> #include <linux/platform_device.h> #include <linux/dma-mapping.h> +#include <linux/io.h> #include <linux/spi/spi.h> @@ -471,4 +472,5 @@ DAVINCI_SOC_START(dm355) .cpu_clks = dm355_clks, .mux_pins = dm355_pins, .mux_pins_num = ARRAY_SIZE(dm355_pins), + .mux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE), DAVINCI_SOC_END diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 889c675..92cda29 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c @@ -11,6 +11,7 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/clk.h> +#include <linux/io.h> #include <mach/dm644x.h> #include <mach/clock.h> @@ -363,4 +364,5 @@ DAVINCI_SOC_START(dm644x) .cpu_clks = dm644x_clks, .mux_pins = dm644x_pins, .mux_pins_num = ARRAY_SIZE(dm644x_pins), + .mux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE), DAVINCI_SOC_END diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index b840128..0b0f9dd 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -11,6 +11,7 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/clk.h> +#include <linux/io.h> #include <mach/dm646x.h> #include <mach/clock.h> @@ -274,4 +275,5 @@ DAVINCI_SOC_START(dm646x) .cpu_clks = dm646x_clks, .mux_pins = dm646x_pins, .mux_pins_num = ARRAY_SIZE(dm646x_pins), + .mux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE), DAVINCI_SOC_END diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h index 7bdf526..741968a 100644 --- a/arch/arm/mach-davinci/include/mach/common.h +++ b/arch/arm/mach-davinci/include/mach/common.h @@ -31,6 +31,7 @@ struct davinci_soc_info { struct clk **cpu_clks; const struct mux_config *mux_pins; unsigned long mux_pins_num; + void __iomem *mux_base; }; #define DAVINCI_SOC_START(_name) \ diff --git a/arch/arm/mach-davinci/mux.c b/arch/arm/mach-davinci/mux.c index 9e3e31b..9bff545 100644 --- a/arch/arm/mach-davinci/mux.c +++ b/arch/arm/mach-davinci/mux.c @@ -21,6 +21,7 @@ #include <mach/hardware.h> #include <mach/mux.h> +#include <mach/common.h> static const struct mux_config *mux_table; static unsigned long pin_table_sz; @@ -40,7 +41,6 @@ int __init davinci_mux_register(const struct mux_config *pins, int __init_or_module davinci_cfg_reg(const unsigned long index) { static DEFINE_SPINLOCK(mux_spin_lock); - void __iomem *base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE); unsigned long flags; const struct mux_config *cfg; unsigned int reg_orig = 0, reg = 0; @@ -68,7 +68,8 @@ int __init_or_module davinci_cfg_reg(const unsigned long index) unsigned tmp1, tmp2; spin_lock_irqsave(&mux_spin_lock, flags); - reg_orig = __raw_readl(base + cfg->mux_reg); + reg_orig = __raw_readl(davinci_soc_info->mux_base + + cfg->mux_reg); mask = (cfg->mask << cfg->mask_offset); tmp1 = reg_orig & mask; @@ -80,7 +81,7 @@ int __init_or_module davinci_cfg_reg(const unsigned long index) if (tmp1 != tmp2) warn = 1; - __raw_writel(reg, base + cfg->mux_reg); + __raw_writel(reg, davinci_soc_info->mux_base + cfg->mux_reg); spin_unlock_irqrestore(&mux_spin_lock, flags); } @@ -94,7 +95,9 @@ int __init_or_module davinci_cfg_reg(const unsigned long index) if (cfg->debug || warn) { printk(KERN_WARNING "MUX: Setting register %s\n", cfg->name); printk(KERN_WARNING " %s (0x%08x) = 0x%08x -> 0x%08x\n", - cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg); + cfg->mux_reg_name, + davinci_soc_info->mux_base + cfg->mux_reg, + reg_orig, reg); } #endif -- 1.6.0.3 _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
