On Monday 23 March 2009, Rajashekhara, Sudhakar wrote:
>
> > Isn't EDMA support going to have to cope with the fact
> > that the rw_threshold values associated with that bit
> > are twice the size the driver currently expects?
>
> On da830/omap-l137, the FIFOLEV bit should be 0 for
> rw_threshold value of 32 and 1 for rw_threshold value of 64.
> EDMA support need not be changed as long as rw_threshold
> value remains 32.
But:
static unsigned rw_threshold = 32;
module_param(rw_threshold, uint, S_IRUGO);
MODULE_PARM_DESC(rw_threshold,
"Read/Write threshold, can be 16/32. Default = 32");
...
static void
mmc_davinci_prepare_data(struct mmc_davinci_host *host, struct mmc_request *req)
{
int fifo_lev = (rw_threshold == 32) ? MMCFIFOCTL_FIFOLEV : 0;
...
says 0 == ?? and 1 == 32 ...
not 0 == 32 and 1 == 64
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