Hello.
Mark A. Greer wrote:
Use the SoC infrastructure to hold the interrupt controller
information (i.e., base address, default priorities,
interrupt controller type, and the number of IRQs).
The interrupt controller base, although initially put
in 'davinci_soc_info->intc_base', is eventually put in
the global 'davinci_intc_base' so the low-level interrupt
code can access it without a dereference.
These changes enable the SoC default irq priorities to be
put in the SoC-specific files, and the interrupt controller
to be at any base address.
Signed-off-by: Mark A. Greer <[email protected]>
[...]
struct davinci_soc_info *dm646x_get_soc_info(void)
diff --git a/arch/arm/mach-davinci/include/mach/common.h
b/arch/arm/mach-davinci/include/mach/common.h
index 7d072e2..b69a74f 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -17,6 +17,7 @@ struct sys_timer;
extern struct sys_timer davinci_timer;
extern void davinci_irq_init(void);
+extern void __iomem *davinci_intc_base;
/* parameters describe VBUS sourcing for host mode */
extern void setup_usb(unsigned mA, unsigned potpgt_msec);
@@ -41,6 +42,10 @@ struct davinci_soc_info {
const struct mux_config *pinmux_pins;
unsigned long pinmux_pins_num;
#endif
+ void __iomem *intc_base;
+ u8 *intc_priorities;
I'm suggesting 'intc_irq_prios' or just 'irq_prios'...
+ int intc_type;
+ unsigned long intc_num;
This name doesn't go with your naming scheme well, as you can't tell
whether it's the number of IRQs and not the number of the interrupt
controllers. I'm suggesting 'intc_irq_num' or just 'irq_num'.
WBR, Sergei
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