RISC = Reduced Instruction Set Chip CISC = Complex Instruction Set Chip
RISC generally only support 32 bit instructions / data (probably more reciently 64 bit). The theory behind RISC is put the smarts in the compiler and have a simple CPU that executes simple instructions very fast. Examples of RISC would be the PowerPC, SPARC, MIPS and I think ARM.
CISC is a little bit different. It tries to have a comprehensive set of instructions (one instruction may do many things and take many cycles to execute) making the compilers simpler.
If you look at the x86 instruction set (it's very big) and compare it to a RISC instruction set you'll immediately see the difference.
Definition of RISC: http://en.wikipedia.org/wiki/RISC
PowerPC instruction Set: http://pds.twi.tudelft.nl/vakken/in1200/labcourse/instruction-set/
Pentium instruction Set:
http://faydoc.tripod.com/cpu/index.htm
The Pentium 4 will have many more instructions (not to mention MMX and SSE/SSE2) but I could not find a reference on the web.
Alister Christie Computers for People Ph: 04 471 1849 Fax: 04 471 1266 http://www.salespartner.co.nz PO Box 13085 Johnsonville Wellington
Neven MacEwan wrote:
At some point Intel developed/exposed a RISC instruction set, I thought it was the 486
The family goes (from memory)
8080 8085 8088 (IBM PC) 8086 80186 80286 (IBM AT) 80386 (Compaq) 80486 Pentium
As for a 'RISC' core, all CISC processors have a RISC core (microcoded or hardwired)
In my definition a RISC processor executes instructions in 1 cycle, and as such I think you'll
find the majority of the pentium instruction set RISC, though it has a CISC family lineage
Neven MacEwan (B.E. E&E) Ph. 09 621 0001 Mob. 0274 749062
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