You can look how DMAMUX is implemented for stm32h7. It's more complicated than in G4 and H7 is based on DMA IPv2 but the concept should be the same. I got my NUCLEO-G431RB so I can help.
czw., 7 maj 2020 o 00:15 Nathan Hartman <hartman.nat...@gmail.com> napisał(a): > On Wed, May 6, 2020 at 6:10 PM Nathan Hartman <hartman.nat...@gmail.com> > wrote: > > On Wed, May 6, 2020 at 4:56 PM Gregory Nutt <spudan...@gmail.com> wrote: > > > > In arch/arm/src/stm32/hardware/stm32_dma_v1.h, I have to add DMA > > > > channel mappings of the form: > > > > > > > > # define DMACHAN_ADC1 STM32_DMA1_CHAN1 > > > > > > > > for the (new) case of CONFIG_STM32_STM32G47XX. > > > > > > > > How / where can I find the names and values that should be defined? > > > > > > Probably in the data sheet rather that the user manual > > > > I am beginning to see what's going on here, but I don't claim to > > understand how this works yet. > > Oh, I forgot to say, the datasheet contains almost nothing. The > information seems to be in the Reference Manual after all (though I > didn't see it earlier because I was looking for a table of peripherals > to DMA channels, like you'd expect to find on most MCUs). The > reference manual is RM0440 Rev 2, and it's in Table 81 (pages 383-384) > where it seems that each peripheral DMA source/destination has a > decimal number from 1 to 115, representing the DMAMUX input request > number. > > Nathan >
