Re: [edk2-devel] [RFC PATCH 0/8] hw/arm/virt, hw/pci: PCI pre-enumeration and fixed BAR allocation

[Mohamed Mediouni via groups.io]

> On 11. May 2026, at 14:26, Jason Gunthorpe <j...@nvidia.com> wrote:
> 
> On Mon, May 11, 2026 at 08:46:57AM +0100, Peter Maydell wrote:
>> On Fri, 8 May 2026 at 19:37, Tushar Dave <td...@nvidia.com> wrote:
>>> 
>>> This RFC introduces a mechanism to specify Guest Physical Addresses
>>> (GPAs) for PCI BARs, allowing explicit placement of guest MMIO BAR
>>> addresses to match host physical addresses for assigned devices.
>>> 
>>> On some platforms, P2P DMA is performed between devices within the same
>>> IOMMU group. The PCI fabric ACS is configured to permit direct P2P
>>> without going through the host bridge in order to achieve the required
>>> performance.
>>> 
>>> To support this multi-device IOMMU group P2P scenario in virtualization,
>>> the VM may need to use the same MMIO BAR addresses as the host physical
>>> address layout.
>> 
>> This feels like something's wrong in the design. A VM doesn't
>> necessarily have the same memory layout as the host: the
>> VM hardware is all about making that possible.
> 
> The HW running these systems is unfortunately limited and doesn't have
> ATS support. Without the right HW features the physical PCI topology
> is leaked into the VM and there is no choice but to have the VM guest
> physical and true physical match, otherwise the VM can't work.
> 
> There is no other way to support these VM shapes on this HW.
> 
> Newer CPUs in this family have more HW features and won't need to do
> these things.
> 
> Jason
> 

Hi,

It has been years already since I last looked at Grace (synthetic-)PCIe handling
(and it was with another VMM than QEMU) but...
 
As you’ve said newer parts will not have this quite peculiar requirement, and
that makes me think that this is maybe suited as more of a workaround that
is not open ended... by having it open just like that there’s a chance that it
would get future users and I don’t think that makes a bunch of sense.

And not very relevant to Grace + GPU systems specifically, but any hopes of live
migration support are lost outside of very awkward placement trickery when using
this to match host addresses.

Is this specific to the NIC attached directly to the GPU (that is
then attached over C2C) configuration?

Using PCIe passthrough with ATS disabled doesn’t sound like such a great idea
on the security side of things imo.




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