On 04/14/2011 08:33 PM, Sebastien Bourdeauducq wrote: > Hi, > > On Thu, 2011-04-14 at 19:37 +0200, Norman Feske wrote: >> which register size is considered big? I think 8 bit would be enough - >> but I have no idea if this is already imposing a problem. Anyway, having >> a small task ID register would be better than having none. > > 8-bit should be doable. It would typically use ~ 1 kilobyte of extra > on-chip memory, and has a chance of fitting in the timing budget. > >> In the event >> the number of tasks exceeds the capacity of the task ID register, the OS >> can still start flushing caches. > > Ok. > >>> Considering a time slice is ~20ms, this looks like plenty of time >>> for the task execution to replace the quasi totality of the cache >>> contents... >> >> In practice, context switches happen far more often than that. > > Hmm... why not, then. Maybe we could even include a performance counter > in the cache in order to measure on the live system the percentage of > cache lines re-used across context switches using this scheme. In either > case it would make for interesting research :) > > Lars, Michael, Takeshi: any comment about using 8-bit task ID cache tags > in Linux?
If I understand it correctly this looks at lot like ARM Fast Context Switching: http://lwn.net/images/conf/rtlws11/papers/proc/p01.pdf So, yes it should work and if it does not we can still flush the cashes on context switch. - Lars _______________________________________________ http://lists.milkymist.org/listinfo.cgi/devel-milkymist.org IRC: #milkymist@Freenode Twitter: www.twitter.com/milkymistvj Ideas? http://milkymist.uservoice.com
