S?bastien Bourdeauducq wrote: > Weird GCC optimizations? Have you looked at the change in the assembly code?
Only briefly. The code all this generates is quite complex, so analyzing it would take a good while. Rewriting the whole usb_in function in assembler may be an option, but then it's probably easier to drop a CRC checker into the SoC. In any case, I need better feedback on the internal timing. Looking at the bits on the wire only tells me what didn't work but it doesn't help me to understand why. Maybe I'm also looking at the wrong place and the timing issues I currently see aren't what causes the real problems. (The timing is very marginal. Basically 0-1 bit clock off the edge of the timeout. What surprises me is that code changes have little effect on this.) Also in this case, being able to construct more complex triggers will help. - Werner _______________________________________________ http://lists.milkymist.org/listinfo.cgi/devel-milkymist.org IRC: #milkymist@Freenode
