And now, all three: dpll_ce, rx_active, and rx_pending. Note that
the more signals I add the more crosstalk I get from my "logic
analyzer". So all the glitches are probably Rigol's fault. (*)
(*) You may think I'm handwaving, but don't worry. This thread
has it all:
http://www.rcgroups.com/forums/showthread.php?t=663958
The discussion of the LA starts around page 10.
Anyway, back to M1. Here are the waveforms of a NAK with rx_pending
early by zero, one, and two bit times. The red digital signal is
dpll_ce. Below it are rx_active and rx_pending.
http://downloads.qi-hardware.com/people/werner/m1/usb/usb-bclk-0.png
http://downloads.qi-hardware.com/people/werner/m1/usb/usb-bclk-1.png
http://downloads.qi-hardware.com/people/werner/m1/usb/usb-bclk-2.png
The "acceleration" of dpll_ce comes in the form of double-sized
pulses, which then cause two samples to be taken. There is a +2
case zoomed in:
http://downloads.qi-hardware.com/people/werner/m1/usb/usb-bclk-2-zoom-payload.png
Another thing I noticed is that dpll_ce seem to be very close to the
edge of the bit. Below are the zeroes of two SYNC bytes:
http://downloads.qi-hardware.com/people/werner/m1/usb/usb-bclk-0-zoom.png
http://downloads.qi-hardware.com/people/werner/m1/usb/usb-bclk-2-zoom.png
I'm not entirely sure if this isn't a measurement artefact, though.
- Werner
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