In general hardware design these blocks are indeed known as IP cores.
Gateware is more the total of everything and very global. An Ethernet core
sounds more familiar than Ethernet gateware.
LCSD is a nice description of the creative work you guys have going on, so I
have no problem with LCSD.
Erik
> -----Original Message-----
> From: Sébastien Bourdeauducq
> [mailto:[email protected]] On Behalf Of Sébastien
> Bourdeauducq
> Sent: 15 February 2012 12:38
> To: Manohar Vanga
> Cc: Javier Serrano; Alan Langman; [email protected]; Milkymist One,
> Milkymist SoC and Flickernoise developers' list; [email protected]
> Subject: Re: Self-Describing Wishbone Bus
>
> Hi,
>
> On 02/13/2012 03:07 PM, Manohar Vanga wrote:
> > Also for the name, I was thinking of yet another horrible acronym:
> >
> > LCSD: Logic Core Self Description (I refuse to put the word IP core
> > into the name anywhere :D). Sounds like LSD...
>
> What about "gateware" instead of "IP core"? It's neutral, descriptive (so
> people unfamiliar with the term can guess what it means), already used by
> some people, and sounds OK: "Ethernet gateware", "acceleration gateware",
> "crypto gateware", "memory controller gateware"...
>
> > I think Alessandro has already replied to this but I add my own too.
> > We want to support devices ranging from constrained to lavish and we
> > were thinking of providing different sized descriptors for differing
> > space availability. What is your opinion of such an approach?
> >
> > We could do something like 64, 32, 16 bit versions of all the parts of
> > the spec (header, id block, device descriptors, child pointers).
>
> Yes, sounds good.
>
> Best,
> Sébastien
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