On Tue, Jul 04, 2017 at 02:10:45PM -0700, Walter Bright via 
Digitalmars-d-announce wrote:
> On 7/4/2017 1:15 PM, Stefan Koch wrote:
> > Most arm implementation are not as forgiving as contemporary x86
> > processors when it comes to bad register scheduling and the like.
> The backend's scheduler is actually very effective. It mattered with
> the Pentium and Pentium Pro processors, but not anymore. But the code
> is still there, and still works, and the algorithm is sound.
>   https://github.com/dlang/dmd/blob/master/src/ddmd/backend/cgsched.c
> The backend has also been accused of not doing data flow analysis. It
> does as good a flow analysis as any compiler.
> Where the backend has fallen behind are:
> 1. loop unrolling
> 2. better inlining

I'd argue these are most important for output code quality, because
performance bottlenecks are usually found in loops, and inlining is a
key component to enabling further reduction of loop complexity during
loop optimization.  Inlining is also critical in range-based code, which
is fast becoming the de facto D coding style these days.

Also, loop unrolling is only the beginning.  Other loop optimizations
are just as important, like strength reduction, hoisting, etc.. (Caveat:
I haven't checked whether DMD specifically performs these optimizations.
But based on looking at previous dmd output, I'm leaning towards no.)

It would be nice if the dmd backend at least got a facelift in these
areas, even if you didn't have the time to do a full-fledged backend

> 3. SROA

This may be important in optimizations of range-based code.


The trouble with TCP jokes is that it's like hearing the same joke over and 

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