On Mon, Nov 28, 2005 at 10:30:57AM +0000, Mark Adams wrote:
> > AFAIK the WSS signals occur during the horizontal blanking period
> > (someone correct me if I'm wrong) so with the current setup they would
> > have to encoded in the TV-encoder. There are no specs for the TV-encoder
> > :(
> 
> Actually, WSS is signalled on the first two-thirds of line 23, the first
> active line of the picture.

Ah you're right of course.

> I've successfully generated a WSS waveform using a Matrox G550 simply
> by creating the appropriate bit pattern on a tiny surface at the top
> of the screen.

Nice. It would be nice to have the driver always do that but there is a 
tiny problem with that. If we were to create the pattern just once we'd 
have to make sure the application doesn't overwrite it. That would be 
quite problematic. The other option would be to generate the pattern 
when Flip() is called. That would work with double and triple buffering 
but would not work with single buffering.

Actually, now that I think about it we could generate the pattern just 
once and then reduce the surface's clip region by one line. That 
would mean DirectFB ilself would never overwrite the pattern.

> The problem is, however, that TVs look for the
> waveform on the composite input, even when in RGB mode.  With the G550
> you can create a nice composite signal that includes WSS but when you
> try to do RGB, you're stuck because (AFAIK), you can't generate
> composite video at the same time as RGB.

This pdf describes WSS. http://www.intersil.com/data/an/an9716.pdf

According to it WSS should be present on all three RGB signals instead 
of the composite signal. But maybe TVs don't actually work that way. I 
think G400 always generates a full composite signal but with G450/G550 
only the sync signal is present.

WSS for NTSC has a few additional problems:
- We'd have to increase the active video to 487 lines to get both WSS 
  lines included.
- The WSS signal is specified as to be '0' at 0 IRE and '1' at 70 IRE. 
  We can't generate 0 IRE due to the 7.5 IRE pedestal.

-- 
Ville Syrjälä
[EMAIL PROTECTED]
http://www.sci.fi/~syrjala/

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