On Thu, Dec 08, 2011 at 03:00:35PM -0500, Richard Lowe wrote: > On Thu, Dec 8, 2011 at 06:52, Hans Rosenfeld > <rosenf...@grumpf.hope-2000.org> wrote: > > The topology information for the scheduler would need to be updated, and > > the topology information for FMA will probably need some work, too. The > > microcode patch loader would need to be changed (there was change in the > > patch format) just in case that microcode updates are released for it. > > > > Did AMD do anything which invalidates the current relationships? > introduce a new _kind_ of relation? It seems like it would be hard to > cause the topology we figure out to be _entirely_ bogus (though I say > that having watched a bogus _CSD manage to do so all on its own...).
The Bulldozer has a completely new microarchitecture which differs in some interesting ways from the old one. The most important one is that cores come in pairs called "compute units", they share a FPU, L2 and L1 instruction caches and a frequency domain. Hans -- %SYSTEM-F-ANARCHISM, The operating system has been overthrown ------------------------------------------- illumos-discuss Archives: https://www.listbox.com/member/archive/182180/=now RSS Feed: https://www.listbox.com/member/archive/rss/182180/21175430-2e6923be Modify Your Subscription: https://www.listbox.com/member/?member_id=21175430&id_secret=21175430-6a77cda4 Powered by Listbox: http://www.listbox.com
